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delve/pkg/proc/linutil/regs_amd64_arch.go

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proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
package linutil
import (
"bytes"
"encoding/binary"
"fmt"
"golang.org/x/arch/x86/x86asm"
*: Update import name to github.com/go-delve/delve The repository is being switched from the personal account github.com/derekparker/delve to the organization account github.com/go-delve/delve. This patch updates imports and docs, while preserving things which should not be changed such as my name in the CHANGELOG and in TODO comments.
2019-01-04 18:39:25 +00:00
"github.com/go-delve/delve/pkg/proc"
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
)
// AMD64Registers implements the proc.Registers interface for the native/linux
// backend and core/linux backends, on AMD64.
type AMD64Registers struct {
Regs *AMD64PtraceRegs
Fpregs []proc.Register
Fpregset *AMD64Xstate
proc/*: only load floating point registers when needed (#1981) Changes implementations of proc.Registers interface and the op.DwarfRegisters struct so that floating point registers can be loaded only when they are needed. Removes the floatingPoint parameter from proc.Thread.Registers. This accomplishes three things: 1. it simplifies the proc.Thread.Registers interface 2. it makes it impossible to accidentally create a broken set of saved registers or of op.DwarfRegisters by accidentally calling Registers(false) 3. it improves general performance of Delve by avoiding to load floating point registers as much as possible Floating point registers are loaded under two circumstances: 1. When the Slice method is called with floatingPoint == true 2. When the Copy method is called Benchmark before: BenchmarkConditionalBreakpoints-4 1 4327350142 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 3852642917 ns/op Updates #1549
2020-05-13 18:56:50 +00:00
loadFpRegs func(*AMD64Registers) error
}
func NewAMD64Registers(regs *AMD64PtraceRegs, loadFpRegs func(*AMD64Registers) error) *AMD64Registers {
return &AMD64Registers{Regs: regs, loadFpRegs: loadFpRegs}
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
}
// AMD64PtraceRegs is the struct used by the linux kernel to return the
// general purpose registers for AMD64 CPUs.
type AMD64PtraceRegs struct {
R15 uint64
R14 uint64
R13 uint64
R12 uint64
Rbp uint64
Rbx uint64
R11 uint64
R10 uint64
R9 uint64
R8 uint64
Rax uint64
Rcx uint64
Rdx uint64
Rsi uint64
Rdi uint64
Orig_rax uint64
Rip uint64
Cs uint64
Eflags uint64
Rsp uint64
Ss uint64
Fs_base uint64
Gs_base uint64
Ds uint64
Es uint64
Fs uint64
Gs uint64
}
// Slice returns the registers as a list of (name, value) pairs.
proc/*: only load floating point registers when needed (#1981) Changes implementations of proc.Registers interface and the op.DwarfRegisters struct so that floating point registers can be loaded only when they are needed. Removes the floatingPoint parameter from proc.Thread.Registers. This accomplishes three things: 1. it simplifies the proc.Thread.Registers interface 2. it makes it impossible to accidentally create a broken set of saved registers or of op.DwarfRegisters by accidentally calling Registers(false) 3. it improves general performance of Delve by avoiding to load floating point registers as much as possible Floating point registers are loaded under two circumstances: 1. When the Slice method is called with floatingPoint == true 2. When the Copy method is called Benchmark before: BenchmarkConditionalBreakpoints-4 1 4327350142 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 3852642917 ns/op Updates #1549
2020-05-13 18:56:50 +00:00
func (r *AMD64Registers) Slice(floatingPoint bool) ([]proc.Register, error) {
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
var regs = []struct {
k string
v uint64
}{
{"Rip", r.Regs.Rip},
{"Rsp", r.Regs.Rsp},
{"Rax", r.Regs.Rax},
{"Rbx", r.Regs.Rbx},
{"Rcx", r.Regs.Rcx},
{"Rdx", r.Regs.Rdx},
{"Rdi", r.Regs.Rdi},
{"Rsi", r.Regs.Rsi},
{"Rbp", r.Regs.Rbp},
{"R8", r.Regs.R8},
{"R9", r.Regs.R9},
{"R10", r.Regs.R10},
{"R11", r.Regs.R11},
{"R12", r.Regs.R12},
{"R13", r.Regs.R13},
{"R14", r.Regs.R14},
{"R15", r.Regs.R15},
{"Orig_rax", r.Regs.Orig_rax},
{"Cs", r.Regs.Cs},
proc: only format registers value when it's necessary (#1860) A significant amount of time is spent generating the string representation for the proc.Registers object of each thread, since this field is rarely used (only when the Registers API is called) it should be generated on demand. Also by changing the internal representation of proc.Register to be closer to that of op.DwarfRegister it will help us implement #1838 (when Delve will need to be able to display the registers of an internal frame, which we currently represent using op.DwarfRegister objects). Benchmark before: BenchmarkConditionalBreakpoints-4 1 22292554301 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 17326345671 ns/op Reduces conditional breakpoint latency from 2.2ms to 1.7ms. Updates #1549, #1838
2020-02-12 21:31:48 +00:00
{"Rflags", r.Regs.Eflags},
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
{"Ss", r.Regs.Ss},
{"Fs_base", r.Regs.Fs_base},
{"Gs_base", r.Regs.Gs_base},
{"Ds", r.Regs.Ds},
{"Es", r.Regs.Es},
{"Fs", r.Regs.Fs},
{"Gs", r.Regs.Gs},
}
out := make([]proc.Register, 0, len(regs)+len(r.Fpregs))
for _, reg := range regs {
proc: only format registers value when it's necessary (#1860) A significant amount of time is spent generating the string representation for the proc.Registers object of each thread, since this field is rarely used (only when the Registers API is called) it should be generated on demand. Also by changing the internal representation of proc.Register to be closer to that of op.DwarfRegister it will help us implement #1838 (when Delve will need to be able to display the registers of an internal frame, which we currently represent using op.DwarfRegister objects). Benchmark before: BenchmarkConditionalBreakpoints-4 1 22292554301 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 17326345671 ns/op Reduces conditional breakpoint latency from 2.2ms to 1.7ms. Updates #1549, #1838
2020-02-12 21:31:48 +00:00
out = proc.AppendUint64Register(out, reg.k, reg.v)
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
}
proc/*: only load floating point registers when needed (#1981) Changes implementations of proc.Registers interface and the op.DwarfRegisters struct so that floating point registers can be loaded only when they are needed. Removes the floatingPoint parameter from proc.Thread.Registers. This accomplishes three things: 1. it simplifies the proc.Thread.Registers interface 2. it makes it impossible to accidentally create a broken set of saved registers or of op.DwarfRegisters by accidentally calling Registers(false) 3. it improves general performance of Delve by avoiding to load floating point registers as much as possible Floating point registers are loaded under two circumstances: 1. When the Slice method is called with floatingPoint == true 2. When the Copy method is called Benchmark before: BenchmarkConditionalBreakpoints-4 1 4327350142 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 3852642917 ns/op Updates #1549
2020-05-13 18:56:50 +00:00
var floatLoadError error
proc/gdbserial: do not return floating point regs when not requested (#1497) Fixes #1493
2019-02-26 16:53:45 +00:00
if floatingPoint {
proc/*: only load floating point registers when needed (#1981) Changes implementations of proc.Registers interface and the op.DwarfRegisters struct so that floating point registers can be loaded only when they are needed. Removes the floatingPoint parameter from proc.Thread.Registers. This accomplishes three things: 1. it simplifies the proc.Thread.Registers interface 2. it makes it impossible to accidentally create a broken set of saved registers or of op.DwarfRegisters by accidentally calling Registers(false) 3. it improves general performance of Delve by avoiding to load floating point registers as much as possible Floating point registers are loaded under two circumstances: 1. When the Slice method is called with floatingPoint == true 2. When the Copy method is called Benchmark before: BenchmarkConditionalBreakpoints-4 1 4327350142 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 3852642917 ns/op Updates #1549
2020-05-13 18:56:50 +00:00
if r.loadFpRegs != nil {
floatLoadError = r.loadFpRegs(r)
r.loadFpRegs = nil
}
proc/gdbserial: do not return floating point regs when not requested (#1497) Fixes #1493
2019-02-26 16:53:45 +00:00
out = append(out, r.Fpregs...)
}
proc/*: only load floating point registers when needed (#1981) Changes implementations of proc.Registers interface and the op.DwarfRegisters struct so that floating point registers can be loaded only when they are needed. Removes the floatingPoint parameter from proc.Thread.Registers. This accomplishes three things: 1. it simplifies the proc.Thread.Registers interface 2. it makes it impossible to accidentally create a broken set of saved registers or of op.DwarfRegisters by accidentally calling Registers(false) 3. it improves general performance of Delve by avoiding to load floating point registers as much as possible Floating point registers are loaded under two circumstances: 1. When the Slice method is called with floatingPoint == true 2. When the Copy method is called Benchmark before: BenchmarkConditionalBreakpoints-4 1 4327350142 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 3852642917 ns/op Updates #1549
2020-05-13 18:56:50 +00:00
return out, floatLoadError
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
}
// PC returns the value of RIP register.
func (r *AMD64Registers) PC() uint64 {
return r.Regs.Rip
}
// SP returns the value of RSP register.
func (r *AMD64Registers) SP() uint64 {
return r.Regs.Rsp
}
func (r *AMD64Registers) BP() uint64 {
return r.Regs.Rbp
}
// TLS returns the address of the thread local storage memory segment.
func (r *AMD64Registers) TLS() uint64 {
return r.Regs.Fs_base
}
// GAddr returns the address of the G variable if it is known, 0 and false
// otherwise.
func (r *AMD64Registers) GAddr() (uint64, bool) {
return 0, false
}
// Get returns the value of the n-th register (in x86asm order).
func (r *AMD64Registers) Get(n int) (uint64, error) {
reg := x86asm.Reg(n)
const (
proc/linutil: Fix register bitmasks The bitmasks for transforming a 64-bit register into it's lower-bit counterparts (e.g. RAX -> EAX -> AX -> AH/AL) were incorrect. This patch fixes the bitmasks and adds an additional test.
2019-06-16 00:56:51 +00:00
mask8 = 0x000000ff
mask16 = 0x0000ffff
mask32 = 0xffffffff
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
)
switch reg {
// 8-bit
case x86asm.AL:
return r.Regs.Rax & mask8, nil
case x86asm.CL:
return r.Regs.Rcx & mask8, nil
case x86asm.DL:
return r.Regs.Rdx & mask8, nil
case x86asm.BL:
return r.Regs.Rbx & mask8, nil
case x86asm.AH:
return (r.Regs.Rax >> 8) & mask8, nil
case x86asm.CH:
return (r.Regs.Rcx >> 8) & mask8, nil
case x86asm.DH:
return (r.Regs.Rdx >> 8) & mask8, nil
case x86asm.BH:
return (r.Regs.Rbx >> 8) & mask8, nil
case x86asm.SPB:
return r.Regs.Rsp & mask8, nil
case x86asm.BPB:
return r.Regs.Rbp & mask8, nil
case x86asm.SIB:
return r.Regs.Rsi & mask8, nil
case x86asm.DIB:
return r.Regs.Rdi & mask8, nil
case x86asm.R8B:
return r.Regs.R8 & mask8, nil
case x86asm.R9B:
return r.Regs.R9 & mask8, nil
case x86asm.R10B:
return r.Regs.R10 & mask8, nil
case x86asm.R11B:
return r.Regs.R11 & mask8, nil
case x86asm.R12B:
return r.Regs.R12 & mask8, nil
case x86asm.R13B:
return r.Regs.R13 & mask8, nil
case x86asm.R14B:
return r.Regs.R14 & mask8, nil
case x86asm.R15B:
return r.Regs.R15 & mask8, nil
// 16-bit
case x86asm.AX:
return r.Regs.Rax & mask16, nil
case x86asm.CX:
return r.Regs.Rcx & mask16, nil
case x86asm.DX:
return r.Regs.Rdx & mask16, nil
case x86asm.BX:
return r.Regs.Rbx & mask16, nil
case x86asm.SP:
return r.Regs.Rsp & mask16, nil
case x86asm.BP:
return r.Regs.Rbp & mask16, nil
case x86asm.SI:
return r.Regs.Rsi & mask16, nil
case x86asm.DI:
return r.Regs.Rdi & mask16, nil
case x86asm.R8W:
return r.Regs.R8 & mask16, nil
case x86asm.R9W:
return r.Regs.R9 & mask16, nil
case x86asm.R10W:
return r.Regs.R10 & mask16, nil
case x86asm.R11W:
return r.Regs.R11 & mask16, nil
case x86asm.R12W:
return r.Regs.R12 & mask16, nil
case x86asm.R13W:
return r.Regs.R13 & mask16, nil
case x86asm.R14W:
return r.Regs.R14 & mask16, nil
case x86asm.R15W:
return r.Regs.R15 & mask16, nil
// 32-bit
case x86asm.EAX:
return r.Regs.Rax & mask32, nil
case x86asm.ECX:
return r.Regs.Rcx & mask32, nil
case x86asm.EDX:
return r.Regs.Rdx & mask32, nil
case x86asm.EBX:
return r.Regs.Rbx & mask32, nil
case x86asm.ESP:
return r.Regs.Rsp & mask32, nil
case x86asm.EBP:
return r.Regs.Rbp & mask32, nil
case x86asm.ESI:
return r.Regs.Rsi & mask32, nil
case x86asm.EDI:
return r.Regs.Rdi & mask32, nil
case x86asm.R8L:
return r.Regs.R8 & mask32, nil
case x86asm.R9L:
return r.Regs.R9 & mask32, nil
case x86asm.R10L:
return r.Regs.R10 & mask32, nil
case x86asm.R11L:
return r.Regs.R11 & mask32, nil
case x86asm.R12L:
return r.Regs.R12 & mask32, nil
case x86asm.R13L:
return r.Regs.R13 & mask32, nil
case x86asm.R14L:
return r.Regs.R14 & mask32, nil
case x86asm.R15L:
return r.Regs.R15 & mask32, nil
// 64-bit
case x86asm.RAX:
return r.Regs.Rax, nil
case x86asm.RCX:
return r.Regs.Rcx, nil
case x86asm.RDX:
return r.Regs.Rdx, nil
case x86asm.RBX:
return r.Regs.Rbx, nil
case x86asm.RSP:
return r.Regs.Rsp, nil
case x86asm.RBP:
return r.Regs.Rbp, nil
case x86asm.RSI:
return r.Regs.Rsi, nil
case x86asm.RDI:
return r.Regs.Rdi, nil
case x86asm.R8:
return r.Regs.R8, nil
case x86asm.R9:
return r.Regs.R9, nil
case x86asm.R10:
return r.Regs.R10, nil
case x86asm.R11:
return r.Regs.R11, nil
case x86asm.R12:
return r.Regs.R12, nil
case x86asm.R13:
return r.Regs.R13, nil
case x86asm.R14:
return r.Regs.R14, nil
case x86asm.R15:
return r.Regs.R15, nil
}
return 0, proc.ErrUnknownRegister
}
proc: correct minor typos (#2148)
2020-08-24 17:19:50 +00:00
// Copy returns a copy of these registers that is guaranteed not to change.
proc/*: only load floating point registers when needed (#1981) Changes implementations of proc.Registers interface and the op.DwarfRegisters struct so that floating point registers can be loaded only when they are needed. Removes the floatingPoint parameter from proc.Thread.Registers. This accomplishes three things: 1. it simplifies the proc.Thread.Registers interface 2. it makes it impossible to accidentally create a broken set of saved registers or of op.DwarfRegisters by accidentally calling Registers(false) 3. it improves general performance of Delve by avoiding to load floating point registers as much as possible Floating point registers are loaded under two circumstances: 1. When the Slice method is called with floatingPoint == true 2. When the Copy method is called Benchmark before: BenchmarkConditionalBreakpoints-4 1 4327350142 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 3852642917 ns/op Updates #1549
2020-05-13 18:56:50 +00:00
func (r *AMD64Registers) Copy() (proc.Registers, error) {
if r.loadFpRegs != nil {
err := r.loadFpRegs(r)
r.loadFpRegs = nil
if err != nil {
return nil, err
}
}
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
var rr AMD64Registers
rr.Regs = &AMD64PtraceRegs{}
rr.Fpregset = &AMD64Xstate{}
*(rr.Regs) = *(r.Regs)
if r.Fpregset != nil {
*(rr.Fpregset) = *(r.Fpregset)
}
if r.Fpregs != nil {
rr.Fpregs = make([]proc.Register, len(r.Fpregs))
copy(rr.Fpregs, r.Fpregs)
}
proc/*: only load floating point registers when needed (#1981) Changes implementations of proc.Registers interface and the op.DwarfRegisters struct so that floating point registers can be loaded only when they are needed. Removes the floatingPoint parameter from proc.Thread.Registers. This accomplishes three things: 1. it simplifies the proc.Thread.Registers interface 2. it makes it impossible to accidentally create a broken set of saved registers or of op.DwarfRegisters by accidentally calling Registers(false) 3. it improves general performance of Delve by avoiding to load floating point registers as much as possible Floating point registers are loaded under two circumstances: 1. When the Slice method is called with floatingPoint == true 2. When the Copy method is called Benchmark before: BenchmarkConditionalBreakpoints-4 1 4327350142 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 3852642917 ns/op Updates #1549
2020-05-13 18:56:50 +00:00
return &rr, nil
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
}
// AMD64PtraceFpRegs tracks user_fpregs_struct in /usr/include/x86_64-linux-gnu/sys/user.h
type AMD64PtraceFpRegs struct {
Cwd uint16
Swd uint16
Ftw uint16
Fop uint16
Rip uint64
Rdp uint64
Mxcsr uint32
MxcrMask uint32
StSpace [32]uint32
XmmSpace [256]byte
Padding [24]uint32
}
// AMD64Xstate represents amd64 XSAVE area. See Section 13.1 (and
// following) of Intel® 64 and IA-32 Architectures Software Developer’s
// Manual, Volume 1: Basic Architecture.
type AMD64Xstate struct {
AMD64PtraceFpRegs
proc: fix support for AVX registers (#2139) Recent changes to the way registers are handled broke reporting of AVX registers (i.e. YMMx). This change restores the functionality by: - concatenating the higher half of the YMMx registers to their corresponding XMMx lower half (YMMx registers do not have an independent DWARF register number) - modifying the formatSSEReg function to handle them when they are present. Fixes #2033
2020-08-31 17:55:43 +00:00
Xsave []byte // raw xsave area
AvxState bool // contains AVX state
YmmSpace [256]byte
Avx512State bool // contains AVX512 state
ZmmSpace [512]byte
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
}
// Decode decodes an XSAVE area to a list of name/value pairs of registers.
func (xsave *AMD64Xstate) Decode() (regs []proc.Register) {
// x87 registers
proc: only format registers value when it's necessary (#1860) A significant amount of time is spent generating the string representation for the proc.Registers object of each thread, since this field is rarely used (only when the Registers API is called) it should be generated on demand. Also by changing the internal representation of proc.Register to be closer to that of op.DwarfRegister it will help us implement #1838 (when Delve will need to be able to display the registers of an internal frame, which we currently represent using op.DwarfRegister objects). Benchmark before: BenchmarkConditionalBreakpoints-4 1 22292554301 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 17326345671 ns/op Reduces conditional breakpoint latency from 2.2ms to 1.7ms. Updates #1549, #1838
2020-02-12 21:31:48 +00:00
regs = proc.AppendUint64Register(regs, "CW", uint64(xsave.Cwd))
regs = proc.AppendUint64Register(regs, "SW", uint64(xsave.Swd))
regs = proc.AppendUint64Register(regs, "TW", uint64(xsave.Ftw))
regs = proc.AppendUint64Register(regs, "FOP", uint64(xsave.Fop))
regs = proc.AppendUint64Register(regs, "FIP", xsave.Rip)
regs = proc.AppendUint64Register(regs, "FDP", xsave.Rdp)
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
for i := 0; i < len(xsave.StSpace); i += 4 {
proc: only format registers value when it's necessary (#1860) A significant amount of time is spent generating the string representation for the proc.Registers object of each thread, since this field is rarely used (only when the Registers API is called) it should be generated on demand. Also by changing the internal representation of proc.Register to be closer to that of op.DwarfRegister it will help us implement #1838 (when Delve will need to be able to display the registers of an internal frame, which we currently represent using op.DwarfRegister objects). Benchmark before: BenchmarkConditionalBreakpoints-4 1 22292554301 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 17326345671 ns/op Reduces conditional breakpoint latency from 2.2ms to 1.7ms. Updates #1549, #1838
2020-02-12 21:31:48 +00:00
var buf bytes.Buffer
binary.Write(&buf, binary.LittleEndian, uint64(xsave.StSpace[i+1])<<32|uint64(xsave.StSpace[i]))
binary.Write(&buf, binary.LittleEndian, uint16(xsave.StSpace[i+2]))
regs = proc.AppendBytesRegister(regs, fmt.Sprintf("ST(%d)", i/4), buf.Bytes())
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
}
// SSE registers
proc: only format registers value when it's necessary (#1860) A significant amount of time is spent generating the string representation for the proc.Registers object of each thread, since this field is rarely used (only when the Registers API is called) it should be generated on demand. Also by changing the internal representation of proc.Register to be closer to that of op.DwarfRegister it will help us implement #1838 (when Delve will need to be able to display the registers of an internal frame, which we currently represent using op.DwarfRegister objects). Benchmark before: BenchmarkConditionalBreakpoints-4 1 22292554301 ns/op Benchmark after: BenchmarkConditionalBreakpoints-4 1 17326345671 ns/op Reduces conditional breakpoint latency from 2.2ms to 1.7ms. Updates #1549, #1838
2020-02-12 21:31:48 +00:00
regs = proc.AppendUint64Register(regs, "MXCSR", uint64(xsave.Mxcsr))
regs = proc.AppendUint64Register(regs, "MXCSR_MASK", uint64(xsave.MxcrMask))
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
for i := 0; i < len(xsave.XmmSpace); i += 16 {
proc: fix support for AVX registers (#2139) Recent changes to the way registers are handled broke reporting of AVX registers (i.e. YMMx). This change restores the functionality by: - concatenating the higher half of the YMMx registers to their corresponding XMMx lower half (YMMx registers do not have an independent DWARF register number) - modifying the formatSSEReg function to handle them when they are present. Fixes #2033
2020-08-31 17:55:43 +00:00
n := i / 16
regs = proc.AppendBytesRegister(regs, fmt.Sprintf("XMM%d", n), xsave.XmmSpace[i:i+16])
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
if xsave.AvxState {
proc: fix support for AVX registers (#2139) Recent changes to the way registers are handled broke reporting of AVX registers (i.e. YMMx). This change restores the functionality by: - concatenating the higher half of the YMMx registers to their corresponding XMMx lower half (YMMx registers do not have an independent DWARF register number) - modifying the formatSSEReg function to handle them when they are present. Fixes #2033
2020-08-31 17:55:43 +00:00
regs = proc.AppendBytesRegister(regs, fmt.Sprintf("YMM%d", n), xsave.YmmSpace[i:i+16])
if xsave.Avx512State {
regs = proc.AppendBytesRegister(regs, fmt.Sprintf("ZMM%d", n), xsave.ZmmSpace[n*32:(n+1)*32])
}
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
}
}
return
}
const (
proc: fix support for AVX registers (#2139) Recent changes to the way registers are handled broke reporting of AVX registers (i.e. YMMx). This change restores the functionality by: - concatenating the higher half of the YMMx registers to their corresponding XMMx lower half (YMMx registers do not have an independent DWARF register number) - modifying the formatSSEReg function to handle them when they are present. Fixes #2033
2020-08-31 17:55:43 +00:00
_XSAVE_HEADER_START = 512
_XSAVE_HEADER_LEN = 64
_XSAVE_EXTENDED_REGION_START = 576
_XSAVE_SSE_REGION_LEN = 416
_XSAVE_AVX512_ZMM_REGION_START = 1152
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
)
// LinuxX86XstateRead reads a byte array containing an XSAVE area into regset.
// If readLegacy is true regset.PtraceFpRegs will be filled with the
// contents of the legacy region of the XSAVE area.
// See Section 13.1 (and following) of Intel® 64 and IA-32 Architectures
// Software Developer’s Manual, Volume 1: Basic Architecture.
func AMD64XstateRead(xstateargs []byte, readLegacy bool, regset *AMD64Xstate) error {
if _XSAVE_HEADER_START+_XSAVE_HEADER_LEN >= len(xstateargs) {
return nil
}
if readLegacy {
rdr := bytes.NewReader(xstateargs[:_XSAVE_HEADER_START])
if err := binary.Read(rdr, binary.LittleEndian, &regset.AMD64PtraceFpRegs); err != nil {
return err
}
}
xsaveheader := xstateargs[_XSAVE_HEADER_START : _XSAVE_HEADER_START+_XSAVE_HEADER_LEN]
xstate_bv := binary.LittleEndian.Uint64(xsaveheader[0:8])
xcomp_bv := binary.LittleEndian.Uint64(xsaveheader[8:16])
if xcomp_bv&(1<<63) != 0 {
// compact format not supported
return nil
}
if xstate_bv&(1<<2) == 0 {
// AVX state not present
return nil
}
avxstate := xstateargs[_XSAVE_EXTENDED_REGION_START:]
regset.AvxState = true
copy(regset.YmmSpace[:], avxstate[:len(regset.YmmSpace)])
proc: fix support for AVX registers (#2139) Recent changes to the way registers are handled broke reporting of AVX registers (i.e. YMMx). This change restores the functionality by: - concatenating the higher half of the YMMx registers to their corresponding XMMx lower half (YMMx registers do not have an independent DWARF register number) - modifying the formatSSEReg function to handle them when they are present. Fixes #2033
2020-08-31 17:55:43 +00:00
if xstate_bv&(1<<6) == 0 {
// AVX512 state not present
return nil
}
avx512state := xstateargs[_XSAVE_AVX512_ZMM_REGION_START:]
regset.Avx512State = true
copy(regset.ZmmSpace[:], avx512state[:len(regset.ZmmSpace)])
// TODO(aarzilli): if xstate_bv&(1<<7) is set then xstateargs[1664:2688]
// contains ZMM16 through ZMM31, those aren't just the higher 256bits, it's
// the full register so each is 64 bytes (512bits)
proc/native,proc/core: deduplicate linux register handling code The linux version of proc/native and proc/core contained largely overlapping implementations of the register handling code, deduplicate it by moving it into proc/linutil.
2018-10-17 14:55:53 +00:00
return nil
}
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