117 lines
2.6 KiB
Go
117 lines
2.6 KiB
Go
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// Copyright 2024 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package riscv64asm
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// Naming for Go decoder arguments:
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//
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// - arg_rd: a general purpose register rd encoded in rd[11:7] field
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//
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// - arg_rs1: a general purpose register rs1 encoded in rs1[19:15] field
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//
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// - arg_rs2: a general purpose register rs2 encoded in rs2[24:20] field
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//
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// - arg_rs3: a general purpose register rs3 encoded in rs3[31:27] field
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//
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// - arg_fd: a floating point register rd encoded in rd[11:7] field
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//
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// - arg_fs1: a floating point register rs1 encoded in rs1[19:15] field
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//
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// - arg_fs2: a floating point register rs2 encoded in rs2[24:20] field
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//
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// - arg_fs3: a floating point register rs3 encoded in rs3[31:27] field
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//
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// - arg_csr: a control status register encoded in csr[31:20] field
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//
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// - arg_rs1_mem: source register with offset in load commands
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//
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// - arg_rs1_store: source register with offset in store commands
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//
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// - arg_rs1_amo: source register with offset in atomic commands
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//
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// - arg_pred: predecessor memory ordering information encoded in pred[27:24] field
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// For details, please refer to chapter 2.7 of ISA manual volume 1
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//
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// - arg_succ: successor memory ordering information encoded in succ[23:20] field
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// For details, please refer to chapter 2.7 of ISA manual volume 1
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//
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// - arg_zimm: a unsigned immediate encoded in zimm[19:15] field
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//
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// - arg_imm12: an I-type immediate encoded in imm12[31:20] field
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//
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// - arg_simm12: a S-type immediate encoded in simm12[31:25|11:7] field
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//
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// - arg_bimm12: a B-type immediate encoded in bimm12[31:25|11:7] field
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//
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// - arg_imm20: an U-type immediate encoded in imm20[31:12] field
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//
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// - arg_jimm20: a J-type immediate encoded in jimm20[31:12] field
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//
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// - arg_shamt5: a shift amount encoded in shamt5[24:20] field
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//
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// - arg_shamt6: a shift amount encoded in shamt6[25:20] field
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//
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type argType uint16
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const (
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_ argType = iota
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arg_rd
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arg_rs1
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arg_rs2
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arg_rs3
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arg_fd
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arg_fs1
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arg_fs2
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arg_fs3
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arg_csr
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arg_rs1_amo
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arg_rs1_mem
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arg_rs1_store
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arg_pred
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arg_succ
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arg_zimm
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arg_imm12
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arg_simm12
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arg_bimm12
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arg_imm20
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arg_jimm20
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arg_shamt5
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arg_shamt6
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// RISC-V Compressed Extension Args
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arg_rd_p
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arg_fd_p
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arg_rs1_p
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arg_rd_rs1_p
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arg_fs2_p
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arg_rs2_p
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arg_rd_n0
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arg_rs1_n0
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arg_rd_rs1_n0
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arg_c_rs1_n0
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arg_c_rs2_n0
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arg_c_fs2
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arg_c_rs2
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arg_rd_n2
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arg_c_imm6
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arg_c_nzimm6
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arg_c_nzuimm6
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arg_c_uimm7
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arg_c_uimm8
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arg_c_uimm8sp_s
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arg_c_uimm8sp
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arg_c_uimm9sp_s
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arg_c_uimm9sp
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arg_c_bimm9
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arg_c_nzimm10
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arg_c_nzuimm10
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arg_c_imm12
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arg_c_nzimm18
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)
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