pkg/proc: apply simplifycompositelit analysis fixes (#3236)
https://pkg.go.dev/golang.org/x/tools/internal/lsp/analysis/simplifycompositelit
This commit is contained in:
Hyang-Ah Hana Kim
GitHub
parent
a6e3d14455
commit
bbc22707d0
@ -42,78 +42,78 @@ func init() {
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var amd64AsmRegisters = map[int]asmRegister{
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// 8-bit
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int(x86asm.AL): asmRegister{regnum.AMD64_Rax, 0, mask8},
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int(x86asm.CL): asmRegister{regnum.AMD64_Rcx, 0, mask8},
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int(x86asm.DL): asmRegister{regnum.AMD64_Rdx, 0, mask8},
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int(x86asm.BL): asmRegister{regnum.AMD64_Rbx, 0, mask8},
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int(x86asm.AH): asmRegister{regnum.AMD64_Rax, 8, mask8},
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int(x86asm.CH): asmRegister{regnum.AMD64_Rcx, 8, mask8},
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int(x86asm.DH): asmRegister{regnum.AMD64_Rdx, 8, mask8},
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int(x86asm.BH): asmRegister{regnum.AMD64_Rbx, 8, mask8},
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int(x86asm.SPB): asmRegister{regnum.AMD64_Rsp, 0, mask8},
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int(x86asm.BPB): asmRegister{regnum.AMD64_Rbp, 0, mask8},
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int(x86asm.SIB): asmRegister{regnum.AMD64_Rsi, 0, mask8},
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int(x86asm.DIB): asmRegister{regnum.AMD64_Rdi, 0, mask8},
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int(x86asm.R8B): asmRegister{regnum.AMD64_R8, 0, mask8},
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int(x86asm.R9B): asmRegister{regnum.AMD64_R9, 0, mask8},
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int(x86asm.R10B): asmRegister{regnum.AMD64_R10, 0, mask8},
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int(x86asm.R11B): asmRegister{regnum.AMD64_R11, 0, mask8},
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int(x86asm.R12B): asmRegister{regnum.AMD64_R12, 0, mask8},
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int(x86asm.R13B): asmRegister{regnum.AMD64_R13, 0, mask8},
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int(x86asm.R14B): asmRegister{regnum.AMD64_R14, 0, mask8},
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int(x86asm.R15B): asmRegister{regnum.AMD64_R15, 0, mask8},
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int(x86asm.AL): {regnum.AMD64_Rax, 0, mask8},
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int(x86asm.CL): {regnum.AMD64_Rcx, 0, mask8},
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int(x86asm.DL): {regnum.AMD64_Rdx, 0, mask8},
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int(x86asm.BL): {regnum.AMD64_Rbx, 0, mask8},
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int(x86asm.AH): {regnum.AMD64_Rax, 8, mask8},
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int(x86asm.CH): {regnum.AMD64_Rcx, 8, mask8},
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int(x86asm.DH): {regnum.AMD64_Rdx, 8, mask8},
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int(x86asm.BH): {regnum.AMD64_Rbx, 8, mask8},
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int(x86asm.SPB): {regnum.AMD64_Rsp, 0, mask8},
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int(x86asm.BPB): {regnum.AMD64_Rbp, 0, mask8},
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int(x86asm.SIB): {regnum.AMD64_Rsi, 0, mask8},
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int(x86asm.DIB): {regnum.AMD64_Rdi, 0, mask8},
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int(x86asm.R8B): {regnum.AMD64_R8, 0, mask8},
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int(x86asm.R9B): {regnum.AMD64_R9, 0, mask8},
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int(x86asm.R10B): {regnum.AMD64_R10, 0, mask8},
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int(x86asm.R11B): {regnum.AMD64_R11, 0, mask8},
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int(x86asm.R12B): {regnum.AMD64_R12, 0, mask8},
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int(x86asm.R13B): {regnum.AMD64_R13, 0, mask8},
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int(x86asm.R14B): {regnum.AMD64_R14, 0, mask8},
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int(x86asm.R15B): {regnum.AMD64_R15, 0, mask8},
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// 16-bit
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int(x86asm.AX): asmRegister{regnum.AMD64_Rax, 0, mask16},
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int(x86asm.CX): asmRegister{regnum.AMD64_Rcx, 0, mask16},
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int(x86asm.DX): asmRegister{regnum.AMD64_Rdx, 0, mask16},
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int(x86asm.BX): asmRegister{regnum.AMD64_Rbx, 0, mask16},
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int(x86asm.SP): asmRegister{regnum.AMD64_Rsp, 0, mask16},
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int(x86asm.BP): asmRegister{regnum.AMD64_Rbp, 0, mask16},
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int(x86asm.SI): asmRegister{regnum.AMD64_Rsi, 0, mask16},
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int(x86asm.DI): asmRegister{regnum.AMD64_Rdi, 0, mask16},
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int(x86asm.R8W): asmRegister{regnum.AMD64_R8, 0, mask16},
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int(x86asm.R9W): asmRegister{regnum.AMD64_R9, 0, mask16},
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int(x86asm.R10W): asmRegister{regnum.AMD64_R10, 0, mask16},
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int(x86asm.R11W): asmRegister{regnum.AMD64_R11, 0, mask16},
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int(x86asm.R12W): asmRegister{regnum.AMD64_R12, 0, mask16},
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int(x86asm.R13W): asmRegister{regnum.AMD64_R13, 0, mask16},
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int(x86asm.R14W): asmRegister{regnum.AMD64_R14, 0, mask16},
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int(x86asm.R15W): asmRegister{regnum.AMD64_R15, 0, mask16},
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int(x86asm.AX): {regnum.AMD64_Rax, 0, mask16},
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int(x86asm.CX): {regnum.AMD64_Rcx, 0, mask16},
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int(x86asm.DX): {regnum.AMD64_Rdx, 0, mask16},
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int(x86asm.BX): {regnum.AMD64_Rbx, 0, mask16},
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int(x86asm.SP): {regnum.AMD64_Rsp, 0, mask16},
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int(x86asm.BP): {regnum.AMD64_Rbp, 0, mask16},
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int(x86asm.SI): {regnum.AMD64_Rsi, 0, mask16},
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int(x86asm.DI): {regnum.AMD64_Rdi, 0, mask16},
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int(x86asm.R8W): {regnum.AMD64_R8, 0, mask16},
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int(x86asm.R9W): {regnum.AMD64_R9, 0, mask16},
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int(x86asm.R10W): {regnum.AMD64_R10, 0, mask16},
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int(x86asm.R11W): {regnum.AMD64_R11, 0, mask16},
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int(x86asm.R12W): {regnum.AMD64_R12, 0, mask16},
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int(x86asm.R13W): {regnum.AMD64_R13, 0, mask16},
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int(x86asm.R14W): {regnum.AMD64_R14, 0, mask16},
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int(x86asm.R15W): {regnum.AMD64_R15, 0, mask16},
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// 32-bit
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int(x86asm.EAX): asmRegister{regnum.AMD64_Rax, 0, mask32},
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int(x86asm.ECX): asmRegister{regnum.AMD64_Rcx, 0, mask32},
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int(x86asm.EDX): asmRegister{regnum.AMD64_Rdx, 0, mask32},
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int(x86asm.EBX): asmRegister{regnum.AMD64_Rbx, 0, mask32},
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int(x86asm.ESP): asmRegister{regnum.AMD64_Rsp, 0, mask32},
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int(x86asm.EBP): asmRegister{regnum.AMD64_Rbp, 0, mask32},
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int(x86asm.ESI): asmRegister{regnum.AMD64_Rsi, 0, mask32},
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int(x86asm.EDI): asmRegister{regnum.AMD64_Rdi, 0, mask32},
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int(x86asm.R8L): asmRegister{regnum.AMD64_R8, 0, mask32},
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int(x86asm.R9L): asmRegister{regnum.AMD64_R9, 0, mask32},
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int(x86asm.R10L): asmRegister{regnum.AMD64_R10, 0, mask32},
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int(x86asm.R11L): asmRegister{regnum.AMD64_R11, 0, mask32},
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int(x86asm.R12L): asmRegister{regnum.AMD64_R12, 0, mask32},
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int(x86asm.R13L): asmRegister{regnum.AMD64_R13, 0, mask32},
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int(x86asm.R14L): asmRegister{regnum.AMD64_R14, 0, mask32},
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int(x86asm.R15L): asmRegister{regnum.AMD64_R15, 0, mask32},
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int(x86asm.EAX): {regnum.AMD64_Rax, 0, mask32},
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int(x86asm.ECX): {regnum.AMD64_Rcx, 0, mask32},
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int(x86asm.EDX): {regnum.AMD64_Rdx, 0, mask32},
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int(x86asm.EBX): {regnum.AMD64_Rbx, 0, mask32},
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int(x86asm.ESP): {regnum.AMD64_Rsp, 0, mask32},
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int(x86asm.EBP): {regnum.AMD64_Rbp, 0, mask32},
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int(x86asm.ESI): {regnum.AMD64_Rsi, 0, mask32},
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int(x86asm.EDI): {regnum.AMD64_Rdi, 0, mask32},
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int(x86asm.R8L): {regnum.AMD64_R8, 0, mask32},
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int(x86asm.R9L): {regnum.AMD64_R9, 0, mask32},
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int(x86asm.R10L): {regnum.AMD64_R10, 0, mask32},
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int(x86asm.R11L): {regnum.AMD64_R11, 0, mask32},
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int(x86asm.R12L): {regnum.AMD64_R12, 0, mask32},
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int(x86asm.R13L): {regnum.AMD64_R13, 0, mask32},
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int(x86asm.R14L): {regnum.AMD64_R14, 0, mask32},
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int(x86asm.R15L): {regnum.AMD64_R15, 0, mask32},
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// 64-bit
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int(x86asm.RAX): asmRegister{regnum.AMD64_Rax, 0, 0},
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int(x86asm.RCX): asmRegister{regnum.AMD64_Rcx, 0, 0},
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int(x86asm.RDX): asmRegister{regnum.AMD64_Rdx, 0, 0},
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int(x86asm.RBX): asmRegister{regnum.AMD64_Rbx, 0, 0},
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int(x86asm.RSP): asmRegister{regnum.AMD64_Rsp, 0, 0},
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int(x86asm.RBP): asmRegister{regnum.AMD64_Rbp, 0, 0},
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int(x86asm.RSI): asmRegister{regnum.AMD64_Rsi, 0, 0},
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int(x86asm.RDI): asmRegister{regnum.AMD64_Rdi, 0, 0},
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int(x86asm.R8): asmRegister{regnum.AMD64_R8, 0, 0},
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int(x86asm.R9): asmRegister{regnum.AMD64_R9, 0, 0},
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int(x86asm.R10): asmRegister{regnum.AMD64_R10, 0, 0},
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int(x86asm.R11): asmRegister{regnum.AMD64_R11, 0, 0},
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int(x86asm.R12): asmRegister{regnum.AMD64_R12, 0, 0},
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int(x86asm.R13): asmRegister{regnum.AMD64_R13, 0, 0},
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int(x86asm.R14): asmRegister{regnum.AMD64_R14, 0, 0},
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int(x86asm.R15): asmRegister{regnum.AMD64_R15, 0, 0},
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int(x86asm.RAX): {regnum.AMD64_Rax, 0, 0},
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int(x86asm.RCX): {regnum.AMD64_Rcx, 0, 0},
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int(x86asm.RDX): {regnum.AMD64_Rdx, 0, 0},
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int(x86asm.RBX): {regnum.AMD64_Rbx, 0, 0},
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int(x86asm.RSP): {regnum.AMD64_Rsp, 0, 0},
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int(x86asm.RBP): {regnum.AMD64_Rbp, 0, 0},
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int(x86asm.RSI): {regnum.AMD64_Rsi, 0, 0},
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int(x86asm.RDI): {regnum.AMD64_Rdi, 0, 0},
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int(x86asm.R8): {regnum.AMD64_R8, 0, 0},
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int(x86asm.R9): {regnum.AMD64_R9, 0, 0},
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int(x86asm.R10): {regnum.AMD64_R10, 0, 0},
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int(x86asm.R11): {regnum.AMD64_R11, 0, 0},
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int(x86asm.R12): {regnum.AMD64_R12, 0, 0},
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int(x86asm.R13): {regnum.AMD64_R13, 0, 0},
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int(x86asm.R14): {regnum.AMD64_R14, 0, 0},
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int(x86asm.R15): {regnum.AMD64_R15, 0, 0},
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}
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@ -1056,7 +1056,7 @@ func (bi *BinaryInfo) LocationCovers(entry *dwarf.Entry, attr dwarf.Attr) ([][2]
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return nil, fmt.Errorf("attribute %s not found", attr)
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}
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if _, isblock := a.([]byte); isblock {
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return [][2]uint64{[2]uint64{0, ^uint64(0)}}, nil
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return [][2]uint64{{0, ^uint64(0)}}, nil
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}
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off, ok := a.(int64)
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@ -68,15 +68,15 @@ func i386FixFrameUnwindContext(fctxt *frame.FrameContext, pc uint64, bi *BinaryI
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return &frame.FrameContext{
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RetAddrReg: regnum.I386_Eip,
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Regs: map[uint64]frame.DWRule{
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regnum.I386_Eip: frame.DWRule{
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regnum.I386_Eip: {
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Rule: frame.RuleOffset,
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Offset: int64(-i.PtrSize()),
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},
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regnum.I386_Ebp: frame.DWRule{
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regnum.I386_Ebp: {
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Rule: frame.RuleOffset,
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Offset: int64(-2 * i.PtrSize()),
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},
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regnum.I386_Esp: frame.DWRule{
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regnum.I386_Esp: {
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Rule: frame.RuleValOffset,
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Offset: 0,
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},
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@ -43,36 +43,36 @@ func init() {
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var i386AsmRegisters = map[int]asmRegister{
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// 8-bit
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int(x86asm.AL): asmRegister{regnum.I386_Eax, 0, mask8},
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int(x86asm.CL): asmRegister{regnum.I386_Ecx, 0, mask8},
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int(x86asm.DL): asmRegister{regnum.I386_Edx, 0, mask8},
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int(x86asm.BL): asmRegister{regnum.I386_Ebx, 0, mask8},
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int(x86asm.AH): asmRegister{regnum.I386_Eax, 8, mask8},
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int(x86asm.CH): asmRegister{regnum.I386_Ecx, 8, mask8},
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int(x86asm.DH): asmRegister{regnum.I386_Edx, 8, mask8},
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int(x86asm.BH): asmRegister{regnum.I386_Ebx, 8, mask8},
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int(x86asm.SPB): asmRegister{regnum.I386_Esp, 0, mask8},
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int(x86asm.BPB): asmRegister{regnum.I386_Ebp, 0, mask8},
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int(x86asm.SIB): asmRegister{regnum.I386_Esi, 0, mask8},
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int(x86asm.DIB): asmRegister{regnum.I386_Edi, 0, mask8},
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int(x86asm.AL): {regnum.I386_Eax, 0, mask8},
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int(x86asm.CL): {regnum.I386_Ecx, 0, mask8},
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int(x86asm.DL): {regnum.I386_Edx, 0, mask8},
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int(x86asm.BL): {regnum.I386_Ebx, 0, mask8},
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int(x86asm.AH): {regnum.I386_Eax, 8, mask8},
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int(x86asm.CH): {regnum.I386_Ecx, 8, mask8},
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int(x86asm.DH): {regnum.I386_Edx, 8, mask8},
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int(x86asm.BH): {regnum.I386_Ebx, 8, mask8},
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int(x86asm.SPB): {regnum.I386_Esp, 0, mask8},
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int(x86asm.BPB): {regnum.I386_Ebp, 0, mask8},
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int(x86asm.SIB): {regnum.I386_Esi, 0, mask8},
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int(x86asm.DIB): {regnum.I386_Edi, 0, mask8},
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// 16-bit
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int(x86asm.AX): asmRegister{regnum.I386_Eax, 0, mask16},
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int(x86asm.CX): asmRegister{regnum.I386_Ecx, 0, mask16},
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int(x86asm.DX): asmRegister{regnum.I386_Edx, 0, mask16},
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int(x86asm.BX): asmRegister{regnum.I386_Ebx, 0, mask16},
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int(x86asm.SP): asmRegister{regnum.I386_Esp, 0, mask16},
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int(x86asm.BP): asmRegister{regnum.I386_Ebp, 0, mask16},
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int(x86asm.SI): asmRegister{regnum.I386_Esi, 0, mask16},
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int(x86asm.DI): asmRegister{regnum.I386_Edi, 0, mask16},
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int(x86asm.AX): {regnum.I386_Eax, 0, mask16},
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int(x86asm.CX): {regnum.I386_Ecx, 0, mask16},
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int(x86asm.DX): {regnum.I386_Edx, 0, mask16},
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int(x86asm.BX): {regnum.I386_Ebx, 0, mask16},
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int(x86asm.SP): {regnum.I386_Esp, 0, mask16},
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int(x86asm.BP): {regnum.I386_Ebp, 0, mask16},
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int(x86asm.SI): {regnum.I386_Esi, 0, mask16},
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int(x86asm.DI): {regnum.I386_Edi, 0, mask16},
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// 32-bit
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int(x86asm.EAX): asmRegister{regnum.I386_Eax, 0, mask32},
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int(x86asm.ECX): asmRegister{regnum.I386_Ecx, 0, mask32},
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int(x86asm.EDX): asmRegister{regnum.I386_Edx, 0, mask32},
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int(x86asm.EBX): asmRegister{regnum.I386_Ebx, 0, mask32},
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int(x86asm.ESP): asmRegister{regnum.I386_Esp, 0, mask32},
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int(x86asm.EBP): asmRegister{regnum.I386_Ebp, 0, mask32},
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int(x86asm.ESI): asmRegister{regnum.I386_Esi, 0, mask32},
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int(x86asm.EDI): asmRegister{regnum.I386_Edi, 0, mask32},
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int(x86asm.EAX): {regnum.I386_Eax, 0, mask32},
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int(x86asm.ECX): {regnum.I386_Ecx, 0, mask32},
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int(x86asm.EDX): {regnum.I386_Edx, 0, mask32},
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int(x86asm.EBX): {regnum.I386_Ebx, 0, mask32},
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int(x86asm.ESP): {regnum.I386_Esp, 0, mask32},
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int(x86asm.EBP): {regnum.I386_Ebp, 0, mask32},
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int(x86asm.ESI): {regnum.I386_Esi, 0, mask32},
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int(x86asm.EDI): {regnum.I386_Edi, 0, mask32},
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}
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@ -3429,11 +3429,11 @@ func TestCgoStacktrace(t *testing.T) {
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// frame than those listed here but all the frames listed must appear in
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// the specified order.
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testCases := [][]string{
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[]string{"main.main"},
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[]string{"C.helloworld_pt2", "C.helloworld", "main.main"},
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[]string{"main.helloWorldS", "main.helloWorld", "C.helloworld_pt2", "C.helloworld", "main.main"},
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[]string{"C.helloworld_pt4", "C.helloworld_pt3", "main.helloWorldS", "main.helloWorld", "C.helloworld_pt2", "C.helloworld", "main.main"},
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[]string{"main.helloWorld2", "C.helloworld_pt4", "C.helloworld_pt3", "main.helloWorldS", "main.helloWorld", "C.helloworld_pt2", "C.helloworld", "main.main"}}
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{"main.main"},
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{"C.helloworld_pt2", "C.helloworld", "main.main"},
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{"main.helloWorldS", "main.helloWorld", "C.helloworld_pt2", "C.helloworld", "main.main"},
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{"C.helloworld_pt4", "C.helloworld_pt3", "main.helloWorldS", "main.helloWorld", "C.helloworld_pt2", "C.helloworld", "main.main"},
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{"main.helloWorld2", "C.helloworld_pt4", "C.helloworld_pt3", "main.helloWorldS", "main.helloWorld", "C.helloworld_pt2", "C.helloworld", "main.main"}}
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var gid int64
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@ -3868,14 +3868,14 @@ func TestInlinedStacktraceAndVariables(t *testing.T) {
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line: 7,
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ok: false,
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varChecks: []varCheck{
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varCheck{
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{
|
||||
name: "a",
|
||||
typ: "int",
|
||||
kind: reflect.Int,
|
||||
hasVal: true,
|
||||
intVal: 3,
|
||||
},
|
||||
varCheck{
|
||||
{
|
||||
name: "z",
|
||||
typ: "int",
|
||||
kind: reflect.Int,
|
||||
@ -3889,14 +3889,14 @@ func TestInlinedStacktraceAndVariables(t *testing.T) {
|
||||
line: 7,
|
||||
ok: false,
|
||||
varChecks: []varCheck{
|
||||
varCheck{
|
||||
{
|
||||
name: "a",
|
||||
typ: "int",
|
||||
kind: reflect.Int,
|
||||
hasVal: true,
|
||||
intVal: 4,
|
||||
},
|
||||
varCheck{
|
||||
{
|
||||
name: "z",
|
||||
typ: "int",
|
||||
kind: reflect.Int,
|
||||
|
||||
@ -1137,7 +1137,7 @@ func (tgt *Target) handleHardcodedBreakpoints(trapthread Thread, threads []Threa
|
||||
hcbp.Addr = loc.PC
|
||||
hcbp.Logical = &LogicalBreakpoint{}
|
||||
hcbp.Logical.Name = HardcodedBreakpoint
|
||||
hcbp.Breaklets = []*Breaklet{&Breaklet{Kind: UserBreakpoint, LogicalID: hardcodedBreakpointID}}
|
||||
hcbp.Breaklets = []*Breaklet{{Kind: UserBreakpoint, LogicalID: hardcodedBreakpointID}}
|
||||
tgt.StopReason = StopHardcodedBreakpoint
|
||||
}
|
||||
|
||||
|
||||
@ -1576,14 +1576,14 @@ func TestEvalExpressionGenerics(t *testing.T) {
|
||||
|
||||
testcases := [][]varTest{
|
||||
// testfn[int, float32]
|
||||
[]varTest{
|
||||
{
|
||||
{"arg1", true, "3", "", "int", nil},
|
||||
{"arg2", true, "2.1", "", "float32", nil},
|
||||
{"m", true, "map[float32]int [2.1: 3, ]", "", "map[float32]int", nil},
|
||||
},
|
||||
|
||||
// testfn[*astruct, astruct]
|
||||
[]varTest{
|
||||
{
|
||||
{"arg1", true, "*main.astruct {x: 0, y: 1}", "", "*main.astruct", nil},
|
||||
{"arg2", true, "main.astruct {x: 2, y: 3}", "", "main.astruct", nil},
|
||||
{"m", true, "map[main.astruct]*main.astruct [{x: 2, y: 3}: *{x: 0, y: 1}, ]", "", "map[main.astruct]*main.astruct", nil},
|
||||
|
||||
Loading…
Reference in New Issue
Block a user