diff --git a/glide.lock b/glide.lock index 62955d0b..53db54de 100644 --- a/glide.lock +++ b/glide.lock @@ -24,7 +24,7 @@ imports: - name: github.com/spf13/pflag version: 9e4c21054fa135711121b557932b1887f2405d92 - name: golang.org/x/arch - version: 58ea1a195b1a354bcd572b7ef6bbbd264dc63732 + version: 077ac972c2e48fdb75168a5ba36a387f0c72d8aa subpackages: - x86/x86asm - name: golang.org/x/sys diff --git a/glide.yaml b/glide.yaml index 2d8c9e10..42eec82c 100644 --- a/glide.yaml +++ b/glide.yaml @@ -17,7 +17,7 @@ import: - package: github.com/spf13/pflag version: 9e4c21054fa135711121b557932b1887f2405d92 - package: golang.org/x/arch - version: 58ea1a195b1a354bcd572b7ef6bbbd264dc63732 + version: 077ac972c2e48fdb75168a5ba36a387f0c72d8aa subpackages: - x86/x86asm - package: golang.org/x/sys diff --git a/pkg/proc/bininfo.go b/pkg/proc/bininfo.go index 0bc95898..23343221 100644 --- a/pkg/proc/bininfo.go +++ b/pkg/proc/bininfo.go @@ -38,10 +38,10 @@ type BinaryInfo struct { loclist loclistReader compileUnits []*compileUnit types map[string]dwarf.Offset - packageVars map[string]dwarf.Offset + packageVars []packageVar // packageVars is a list of all global/package variables in debug_info, sorted by address gStructOffset uint64 - // Functions is a list of all DW_TAG_subprogram entries in debug_info. + // Functions is a list of all DW_TAG_subprogram entries in debug_info, sorted by entry point Functions []Function // Sources is a list of all source files found in debug_line. Sources []string @@ -149,6 +149,15 @@ type constantValue struct { singleBit bool } +// packageVar represents a package-level variable (or a C global variable). +// If a global variable does not have an address (for example it's stored in +// a register, or non-contiguously) addr will be 0. +type packageVar struct { + name string + offset dwarf.Offset + addr uint64 +} + type loclistReader struct { data []byte cur int diff --git a/pkg/proc/disasm.go b/pkg/proc/disasm.go index 33e5d0e9..b0a2768a 100644 --- a/pkg/proc/disasm.go +++ b/pkg/proc/disasm.go @@ -1,5 +1,7 @@ package proc +import "sort" + type AsmInstruction struct { Loc Location DestLoc *Location @@ -14,6 +16,7 @@ type AssemblyFlavour int const ( GNUFlavour = AssemblyFlavour(iota) IntelFlavour + GoFlavour ) // Disassemble disassembles target memory between startPC and endPC, marking @@ -83,3 +86,31 @@ func disassemble(memrw MemoryReadWriter, regs Registers, breakpoints *Breakpoint } return r, nil } + +// Looks up symbol (either functions or global variables) at address addr. +// Used by disassembly formatter. +func (bi *BinaryInfo) symLookup(addr uint64) (string, uint64) { + fn := bi.PCToFunc(addr) + if fn != nil { + if fn.Entry == addr { + // only report the function name if it's the exact address because it's + // easier to read the absolute address than function_name+offset. + return fn.Name, fn.Entry + } + return "", 0 + } + i := sort.Search(len(bi.packageVars), func(i int) bool { + return bi.packageVars[i].addr >= addr + }) + if i >= len(bi.packageVars) { + return "", 0 + } + if bi.packageVars[i].addr > addr { + // report previous variable + offset if i-th variable starts after addr + i-- + } + if i > 0 { + return bi.packageVars[i].name, bi.packageVars[i].addr + } + return "", 0 +} diff --git a/pkg/proc/disasm_amd64.go b/pkg/proc/disasm_amd64.go index cbf62132..f9fcbc47 100644 --- a/pkg/proc/disasm_amd64.go +++ b/pkg/proc/disasm_amd64.go @@ -34,7 +34,7 @@ func patchPCRel(pc uint64, inst *x86asm.Inst) { } } -func (inst *AsmInstruction) Text(flavour AssemblyFlavour) string { +func (inst *AsmInstruction) Text(flavour AssemblyFlavour, bi *BinaryInfo) string { if inst.Inst == nil { return "?" } @@ -43,15 +43,13 @@ func (inst *AsmInstruction) Text(flavour AssemblyFlavour) string { switch flavour { case GNUFlavour: - text = x86asm.GNUSyntax(x86asm.Inst(*inst.Inst)) + text = x86asm.GNUSyntax(x86asm.Inst(*inst.Inst), inst.Loc.PC, bi.symLookup) + case GoFlavour: + text = x86asm.GoSyntax(x86asm.Inst(*inst.Inst), inst.Loc.PC, bi.symLookup) case IntelFlavour: fallthrough default: - text = x86asm.IntelSyntax(x86asm.Inst(*inst.Inst)) - } - - if inst.IsCall() && inst.DestLoc != nil && inst.DestLoc.Fn != nil { - text += " " + inst.DestLoc.Fn.Name + text = x86asm.IntelSyntax(x86asm.Inst(*inst.Inst), inst.Loc.PC, bi.symLookup) } return text diff --git a/pkg/proc/proc_test.go b/pkg/proc/proc_test.go index 9d041d5c..88b2312d 100644 --- a/pkg/proc/proc_test.go +++ b/pkg/proc/proc_test.go @@ -3455,3 +3455,21 @@ func TestIssue1145(t *testing.T) { } }) } + +func TestDisassembleGlobalVars(t *testing.T) { + withTestProcess("teststepconcurrent", t, func(p proc.Process, fixture protest.Fixture) { + mainfn := p.BinInfo().LookupFunc["main.main"] + text, err := proc.Disassemble(p, nil, mainfn.Entry, mainfn.End) + assertNoError(err, t, "Disassemble") + found := false + for i := range text { + if strings.Index(text[i].Text(proc.IntelFlavour, p.BinInfo()), "main.v") > 0 { + found = true + break + } + } + if !found { + t.Fatalf("could not find main.v reference in disassembly") + } + }) +} diff --git a/pkg/proc/types.go b/pkg/proc/types.go index 8071215b..e6956b47 100644 --- a/pkg/proc/types.go +++ b/pkg/proc/types.go @@ -3,6 +3,7 @@ package proc import ( "bytes" "debug/dwarf" + "encoding/binary" "errors" "fmt" "go/ast" @@ -18,6 +19,7 @@ import ( "github.com/derekparker/delve/pkg/dwarf/godwarf" "github.com/derekparker/delve/pkg/dwarf/line" + "github.com/derekparker/delve/pkg/dwarf/op" "github.com/derekparker/delve/pkg/dwarf/reader" ) @@ -169,12 +171,18 @@ func (v compileUnitsByLowpc) Len() int { return len(v) } func (v compileUnitsByLowpc) Less(i int, j int) bool { return v[i].LowPC < v[j].LowPC } func (v compileUnitsByLowpc) Swap(i int, j int) { v[i], v[j] = v[j], v[i] } +type packageVarsByAddr []packageVar + +func (v packageVarsByAddr) Len() int { return len(v) } +func (v packageVarsByAddr) Less(i int, j int) bool { return v[i].addr < v[j].addr } +func (v packageVarsByAddr) Swap(i int, j int) { v[i], v[j] = v[j], v[i] } + func (bi *BinaryInfo) loadDebugInfoMaps(debugLineBytes []byte, wg *sync.WaitGroup) { if wg != nil { defer wg.Done() } bi.types = make(map[string]dwarf.Offset) - bi.packageVars = make(map[string]dwarf.Offset) + bi.packageVars = []packageVar{} bi.Functions = []Function{} bi.compileUnits = []*compileUnit{} bi.consts = make(map[dwarf.Offset]*constantType) @@ -226,7 +234,13 @@ func (bi *BinaryInfo) loadDebugInfoMaps(debugLineBytes []byte, wg *sync.WaitGrou if !cu.isgo { n = "C." + n } - bi.packageVars[n] = entry.Offset + var addr uint64 + if loc, ok := entry.Val(dwarf.AttrLocation).([]byte); ok { + if len(loc) == bi.Arch.PtrSize()+1 && op.Opcode(loc[0]) == op.DW_OP_addr { + addr = binary.LittleEndian.Uint64(loc[1:]) + } + } + bi.packageVars = append(bi.packageVars, packageVar{n, entry.Offset, addr}) } case dwarf.TagConstant: @@ -271,6 +285,7 @@ func (bi *BinaryInfo) loadDebugInfoMaps(debugLineBytes []byte, wg *sync.WaitGrou } sort.Sort(compileUnitsByLowpc(bi.compileUnits)) sort.Sort(functionsDebugInfoByEntry(bi.Functions)) + sort.Sort(packageVarsByAddr(bi.packageVars)) bi.LookupFunc = make(map[string]*Function) for i := range bi.Functions { diff --git a/pkg/proc/variables.go b/pkg/proc/variables.go index 0a2f67d0..c2efc9dc 100644 --- a/pkg/proc/variables.go +++ b/pkg/proc/variables.go @@ -653,10 +653,10 @@ func (scope *EvalScope) PackageVariables(cfg LoadConfig) ([]*Variable, error) { } func (scope *EvalScope) findGlobal(name string) (*Variable, error) { - for n, off := range scope.BinInfo.packageVars { - if n == name || strings.HasSuffix(n, "/"+name) { + for _, pkgvar := range scope.BinInfo.packageVars { + if pkgvar.name == name || strings.HasSuffix(pkgvar.name, "/"+name) { reader := scope.DwarfReader() - reader.Seek(off) + reader.Seek(pkgvar.offset) entry, err := reader.Next() if err != nil { return nil, err diff --git a/service/debugger/debugger.go b/service/debugger/debugger.go index 31e240d0..099ebaf2 100644 --- a/service/debugger/debugger.go +++ b/service/debugger/debugger.go @@ -944,7 +944,7 @@ func (d *Debugger) Disassemble(scope api.EvalScope, startPC, endPC uint64, flavo disass := make(api.AsmInstructions, len(insts)) for i := range insts { - disass[i] = api.ConvertAsmInstruction(insts[i], insts[i].Text(proc.AssemblyFlavour(flavour))) + disass[i] = api.ConvertAsmInstruction(insts[i], insts[i].Text(proc.AssemblyFlavour(flavour), d.target.BinInfo())) } return disass, nil diff --git a/vendor/golang.org/x/arch/AUTHORS b/vendor/golang.org/x/arch/AUTHORS new file mode 100644 index 00000000..2b00ddba --- /dev/null +++ b/vendor/golang.org/x/arch/AUTHORS @@ -0,0 +1,3 @@ +# This source code refers to The Go Authors for copyright purposes. +# The master list of authors is in the main Go distribution, +# visible at https://tip.golang.org/AUTHORS. diff --git a/vendor/golang.org/x/arch/CONTRIBUTING.md b/vendor/golang.org/x/arch/CONTRIBUTING.md new file mode 100644 index 00000000..88dff59b --- /dev/null +++ b/vendor/golang.org/x/arch/CONTRIBUTING.md @@ -0,0 +1,31 @@ +# Contributing to Go + +Go is an open source project. + +It is the work of hundreds of contributors. We appreciate your help! + + +## Filing issues + +When [filing an issue](https://golang.org/issue/new), make sure to answer these five questions: + +1. What version of Go are you using (`go version`)? +2. What operating system and processor architecture are you using? +3. What did you do? +4. What did you expect to see? +5. What did you see instead? + +General questions should go to the [golang-nuts mailing list](https://groups.google.com/group/golang-nuts) instead of the issue tracker. +The gophers there will answer or ask you to file an issue if you've tripped over a bug. + +## Contributing code + +Please read the [Contribution Guidelines](https://golang.org/doc/contribute.html) +before sending patches. + +**We do not accept GitHub pull requests** +(we use [Gerrit](https://code.google.com/p/gerrit/) instead for code review). + +Unless otherwise noted, the Go source files are distributed under +the BSD-style license found in the LICENSE file. + diff --git a/vendor/golang.org/x/arch/CONTRIBUTORS b/vendor/golang.org/x/arch/CONTRIBUTORS new file mode 100644 index 00000000..1fbd3e97 --- /dev/null +++ b/vendor/golang.org/x/arch/CONTRIBUTORS @@ -0,0 +1,3 @@ +# This source code was written by the Go contributors. +# The master list of contributors is in the main Go distribution, +# visible at https://tip.golang.org/CONTRIBUTORS. diff --git a/vendor/golang.org/x/arch/README.md b/vendor/golang.org/x/arch/README.md new file mode 100644 index 00000000..a7d334d3 --- /dev/null +++ b/vendor/golang.org/x/arch/README.md @@ -0,0 +1,6 @@ +# arch + +This repository holds machine architecture information used by the Go toolchain. +The parts needed in the main Go repository are copied in. + +This repository requires Go 1.5+ with the vendor experiment enabled. diff --git a/vendor/golang.org/x/arch/codereview.cfg b/vendor/golang.org/x/arch/codereview.cfg new file mode 100644 index 00000000..3f8b14b6 --- /dev/null +++ b/vendor/golang.org/x/arch/codereview.cfg @@ -0,0 +1 @@ +issuerepo: golang/go diff --git a/vendor/golang.org/x/arch/x86/x86asm/Makefile b/vendor/golang.org/x/arch/x86/x86asm/Makefile new file mode 100644 index 00000000..9eb4557c --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/Makefile @@ -0,0 +1,3 @@ +tables.go: ../x86map/map.go ../x86.csv + go run ../x86map/map.go -fmt=decoder ../x86.csv >_tables.go && gofmt _tables.go >tables.go && rm _tables.go + diff --git a/vendor/golang.org/x/arch/x86/x86asm/decode_test.go b/vendor/golang.org/x/arch/x86/x86asm/decode_test.go new file mode 100644 index 00000000..127be263 --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/decode_test.go @@ -0,0 +1,71 @@ +// Copyright 2014 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package x86asm + +import ( + "encoding/hex" + "io/ioutil" + "strconv" + "strings" + "testing" +) + +func TestDecode(t *testing.T) { + data, err := ioutil.ReadFile("testdata/decode.txt") + if err != nil { + t.Fatal(err) + } + all := string(data) + for strings.Contains(all, "\t\t") { + all = strings.Replace(all, "\t\t", "\t", -1) + } + for _, line := range strings.Split(all, "\n") { + line = strings.TrimSpace(line) + if line == "" || strings.HasPrefix(line, "#") { + continue + } + f := strings.SplitN(line, "\t", 4) + i := strings.Index(f[0], "|") + if i < 0 { + t.Errorf("parsing %q: missing | separator", f[0]) + continue + } + if i%2 != 0 { + t.Errorf("parsing %q: misaligned | separator", f[0]) + } + size := i / 2 + code, err := hex.DecodeString(f[0][:i] + f[0][i+1:]) + if err != nil { + t.Errorf("parsing %q: %v", f[0], err) + continue + } + mode, err := strconv.Atoi(f[1]) + if err != nil { + t.Errorf("invalid mode %q in: %s", f[1], line) + continue + } + syntax, asm := f[2], f[3] + inst, err := Decode(code, mode) + var out string + if err != nil { + out = "error: " + err.Error() + } else { + switch syntax { + case "gnu": + out = GNUSyntax(inst, 0, nil) + case "intel": + out = IntelSyntax(inst, 0, nil) + case "plan9": // [sic] + out = GoSyntax(inst, 0, nil) + default: + t.Errorf("unknown syntax %q", syntax) + continue + } + } + if out != asm || inst.Len != size { + t.Errorf("Decode(%s) [%s] = %s, %d, want %s, %d", f[0], syntax, out, inst.Len, asm, size) + } + } +} diff --git a/vendor/golang.org/x/arch/x86/x86asm/ext_test.go b/vendor/golang.org/x/arch/x86/x86asm/ext_test.go new file mode 100644 index 00000000..72fe45b7 --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/ext_test.go @@ -0,0 +1,810 @@ +// Copyright 2014 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +// Support for testing against external disassembler program. + +package x86asm + +import ( + "bufio" + "bytes" + "encoding/hex" + "flag" + "fmt" + "io/ioutil" + "log" + "math/rand" + "os" + "os/exec" + "regexp" + "runtime" + "strings" + "testing" + "time" +) + +var ( + printTests = flag.Bool("printtests", false, "print test cases that exercise new code paths") + dumpTest = flag.Bool("dump", false, "dump all encodings") + mismatch = flag.Bool("mismatch", false, "log allowed mismatches") + longTest = flag.Bool("long", false, "long test") + keep = flag.Bool("keep", false, "keep object files around") + debug = false +) + +// An ExtInst represents a single decoded instruction parsed +// from an external disassembler's output. +type ExtInst struct { + addr uint32 + enc [32]byte + nenc int + text string +} + +func (r ExtInst) String() string { + return fmt.Sprintf("%#x: % x: %s", r.addr, r.enc, r.text) +} + +// An ExtDis is a connection between an external disassembler and a test. +type ExtDis struct { + Arch int + Dec chan ExtInst + File *os.File + Size int + KeepFile bool + Cmd *exec.Cmd +} + +// Run runs the given command - the external disassembler - and returns +// a buffered reader of its standard output. +func (ext *ExtDis) Run(cmd ...string) (*bufio.Reader, error) { + if *keep { + log.Printf("%s\n", strings.Join(cmd, " ")) + } + ext.Cmd = exec.Command(cmd[0], cmd[1:]...) + out, err := ext.Cmd.StdoutPipe() + if err != nil { + return nil, fmt.Errorf("stdoutpipe: %v", err) + } + if err := ext.Cmd.Start(); err != nil { + return nil, fmt.Errorf("exec: %v", err) + } + + b := bufio.NewReaderSize(out, 1<<20) + return b, nil +} + +// Wait waits for the command started with Run to exit. +func (ext *ExtDis) Wait() error { + return ext.Cmd.Wait() +} + +// testExtDis tests a set of byte sequences against an external disassembler. +// The disassembler is expected to produce the given syntax and be run +// in the given architecture mode (16, 32, or 64-bit). +// The extdis function must start the external disassembler +// and then parse its output, sending the parsed instructions on ext.Dec. +// The generate function calls its argument f once for each byte sequence +// to be tested. The generate function itself will be called twice, and it must +// make the same sequence of calls to f each time. +// When a disassembly does not match the internal decoding, +// allowedMismatch determines whether this mismatch should be +// allowed, or else considered an error. +func testExtDis( + t *testing.T, + syntax string, + arch int, + extdis func(ext *ExtDis) error, + generate func(f func([]byte)), + allowedMismatch func(text string, size int, inst *Inst, dec ExtInst) bool, +) { + start := time.Now() + ext := &ExtDis{ + Dec: make(chan ExtInst), + Arch: arch, + } + errc := make(chan error) + + // First pass: write instructions to input file for external disassembler. + file, f, size, err := writeInst(generate) + if err != nil { + t.Fatal(err) + } + ext.Size = size + ext.File = f + defer func() { + f.Close() + if !*keep { + os.Remove(file) + } + }() + + // Second pass: compare disassembly against our decodings. + var ( + totalTests = 0 + totalSkips = 0 + totalErrors = 0 + + errors = make([]string, 0, 100) // sampled errors, at most cap + ) + go func() { + errc <- extdis(ext) + }() + generate(func(enc []byte) { + dec, ok := <-ext.Dec + if !ok { + t.Errorf("decoding stream ended early") + return + } + inst, text := disasm(syntax, arch, pad(enc)) + totalTests++ + if *dumpTest { + fmt.Printf("%x -> %s [%d]\n", enc[:len(enc)], dec.text, dec.nenc) + } + if text != dec.text || inst.Len != dec.nenc { + suffix := "" + if allowedMismatch(text, size, &inst, dec) { + totalSkips++ + if !*mismatch { + return + } + suffix += " (allowed mismatch)" + } + totalErrors++ + if len(errors) >= cap(errors) { + j := rand.Intn(totalErrors) + if j >= cap(errors) { + return + } + errors = append(errors[:j], errors[j+1:]...) + } + errors = append(errors, fmt.Sprintf("decode(%x) = %q, %d, want %q, %d%s", enc, text, inst.Len, dec.text, dec.nenc, suffix)) + } + }) + + if *mismatch { + totalErrors -= totalSkips + } + + for _, b := range errors { + t.Log(b) + } + + if totalErrors > 0 { + t.Fail() + } + t.Logf("%d test cases, %d expected mismatches, %d failures; %.0f cases/second", totalTests, totalSkips, totalErrors, float64(totalTests)/time.Since(start).Seconds()) + + if err := <-errc; err != nil { + t.Fatalf("external disassembler: %v", err) + } +} + +const start = 0x8000 // start address of text + +// writeInst writes the generated byte sequences to a new file +// starting at offset start. That file is intended to be the input to +// the external disassembler. +func writeInst(generate func(func([]byte))) (file string, f *os.File, size int, err error) { + f, err = ioutil.TempFile("", "x86map") + if err != nil { + return + } + + file = f.Name() + + f.Seek(start, 0) + w := bufio.NewWriter(f) + defer w.Flush() + size = 0 + generate(func(x []byte) { + if len(x) > 16 { + x = x[:16] + } + if debug { + fmt.Printf("%#x: %x%x\n", start+size, x, pops[len(x):]) + } + w.Write(x) + w.Write(pops[len(x):]) + size += len(pops) + }) + return file, f, size, nil +} + +// 0x5F is a single-byte pop instruction. +// We pad the bytes we want decoded with enough 0x5Fs +// that no matter what state the instruction stream is in +// after reading our bytes, the pops will get us back to +// a forced instruction boundary. +var pops = []byte{ + 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, + 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, + 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, + 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, +} + +// pad pads the code sequence with pops. +func pad(enc []byte) []byte { + return append(enc[:len(enc):len(enc)], pops...) +} + +// disasm returns the decoded instruction and text +// for the given source bytes, using the given syntax and mode. +func disasm(syntax string, mode int, src []byte) (inst Inst, text string) { + // If printTests is set, we record the coverage value + // before and after, and we write out the inputs for which + // coverage went up, in the format expected in testdata/decode.text. + // This produces a fairly small set of test cases that exercise nearly + // all the code. + var cover float64 + if *printTests { + cover -= coverage() + } + + inst, err := decode1(src, mode, syntax == "gnu") + if err != nil { + text = "error: " + err.Error() + } else { + switch syntax { + case "gnu": + text = GNUSyntax(inst, 0, nil) + case "intel": + text = IntelSyntax(inst, 0, nil) + case "plan9": // [sic] + text = GoSyntax(inst, 0, nil) + default: + text = "error: unknown syntax " + syntax + } + } + + if *printTests { + cover += coverage() + if cover > 0 { + max := len(src) + if max > 16 && inst.Len <= 16 { + max = 16 + } + fmt.Printf("%x|%x\t%d\t%s\t%s\n", src[:inst.Len], src[inst.Len:max], mode, syntax, text) + } + } + + return +} + +// coverage returns a floating point number denoting the +// test coverage until now. The number increases when new code paths are exercised, +// both in the Go program and in the decoder byte code. +func coverage() float64 { + /* + testing.Coverage is not in the main distribution. + The implementation, which must go in package testing, is: + + // Coverage reports the current code coverage as a fraction in the range [0, 1]. + func Coverage() float64 { + var n, d int64 + for _, counters := range cover.Counters { + for _, c := range counters { + if c > 0 { + n++ + } + d++ + } + } + if d == 0 { + return 0 + } + return float64(n) / float64(d) + } + */ + + var f float64 + // f += testing.Coverage() + f += decodeCoverage() + return f +} + +func decodeCoverage() float64 { + n := 0 + for _, t := range decoderCover { + if t { + n++ + } + } + return float64(1+n) / float64(1+len(decoderCover)) +} + +// Helpers for writing disassembler output parsers. + +// isPrefix reports whether text is the name of an instruction prefix. +func isPrefix(text string) bool { + return prefixByte[text] > 0 +} + +// prefixByte maps instruction prefix text to actual prefix byte values. +var prefixByte = map[string]byte{ + "es": 0x26, + "cs": 0x2e, + "ss": 0x36, + "ds": 0x3e, + "fs": 0x64, + "gs": 0x65, + "data16": 0x66, + "addr16": 0x67, + "lock": 0xf0, + "repn": 0xf2, + "repne": 0xf2, + "rep": 0xf3, + "repe": 0xf3, + "xacquire": 0xf2, + "xrelease": 0xf3, + "bnd": 0xf2, + "addr32": 0x66, + "data32": 0x67, +} + +// hasPrefix reports whether any of the space-separated words in the text s +// begins with any of the given prefixes. +func hasPrefix(s string, prefixes ...string) bool { + for _, prefix := range prefixes { + for s := s; s != ""; { + if strings.HasPrefix(s, prefix) { + return true + } + i := strings.Index(s, " ") + if i < 0 { + break + } + s = s[i+1:] + } + } + return false +} + +// contains reports whether the text s contains any of the given substrings. +func contains(s string, substrings ...string) bool { + for _, sub := range substrings { + if strings.Contains(s, sub) { + return true + } + } + return false +} + +// isHex reports whether b is a hexadecimal character (0-9A-Fa-f). +func isHex(b byte) bool { return b == '0' || unhex[b] > 0 } + +// parseHex parses the hexadecimal byte dump in hex, +// appending the parsed bytes to raw and returning the updated slice. +// The returned bool signals whether any invalid hex was found. +// Spaces and tabs between bytes are okay but any other non-hex is not. +func parseHex(hex []byte, raw []byte) ([]byte, bool) { + hex = trimSpace(hex) + for j := 0; j < len(hex); { + for hex[j] == ' ' || hex[j] == '\t' { + j++ + } + if j >= len(hex) { + break + } + if j+2 > len(hex) || !isHex(hex[j]) || !isHex(hex[j+1]) { + return nil, false + } + raw = append(raw, unhex[hex[j]]<<4|unhex[hex[j+1]]) + j += 2 + } + return raw, true +} + +var unhex = [256]byte{ + '0': 0, + '1': 1, + '2': 2, + '3': 3, + '4': 4, + '5': 5, + '6': 6, + '7': 7, + '8': 8, + '9': 9, + 'A': 10, + 'B': 11, + 'C': 12, + 'D': 13, + 'E': 14, + 'F': 15, + 'a': 10, + 'b': 11, + 'c': 12, + 'd': 13, + 'e': 14, + 'f': 15, +} + +// index is like bytes.Index(s, []byte(t)) but avoids the allocation. +func index(s []byte, t string) int { + i := 0 + for { + j := bytes.IndexByte(s[i:], t[0]) + if j < 0 { + return -1 + } + i = i + j + if i+len(t) > len(s) { + return -1 + } + for k := 1; k < len(t); k++ { + if s[i+k] != t[k] { + goto nomatch + } + } + return i + nomatch: + i++ + } +} + +// fixSpace rewrites runs of spaces, tabs, and newline characters into single spaces in s. +// If s must be rewritten, it is rewritten in place. +func fixSpace(s []byte) []byte { + s = trimSpace(s) + for i := 0; i < len(s); i++ { + if s[i] == '\t' || s[i] == '\n' || i > 0 && s[i] == ' ' && s[i-1] == ' ' { + goto Fix + } + } + return s + +Fix: + b := s + w := 0 + for i := 0; i < len(s); i++ { + c := s[i] + if c == '\t' || c == '\n' { + c = ' ' + } + if c == ' ' && w > 0 && b[w-1] == ' ' { + continue + } + b[w] = c + w++ + } + if w > 0 && b[w-1] == ' ' { + w-- + } + return b[:w] +} + +// trimSpace trims leading and trailing space from s, returning a subslice of s. +func trimSpace(s []byte) []byte { + j := len(s) + for j > 0 && (s[j-1] == ' ' || s[j-1] == '\t' || s[j-1] == '\n') { + j-- + } + i := 0 + for i < j && (s[i] == ' ' || s[i] == '\t') { + i++ + } + return s[i:j] +} + +// pcrel and pcrelw match instructions using relative addressing mode. +var ( + pcrel = regexp.MustCompile(`^((?:.* )?(?:j[a-z]+|call|ljmp|loopn?e?w?|xbegin)q?(?:,p[nt])?) 0x([0-9a-f]+)$`) + pcrelw = regexp.MustCompile(`^((?:.* )?(?:callw|jmpw|xbeginw|ljmpw)(?:,p[nt])?) 0x([0-9a-f]+)$`) +) + +// Generators. +// +// The test cases are described as functions that invoke a callback repeatedly, +// with a new input sequence each time. These helpers make writing those +// a little easier. + +// hexCases generates the cases written in hexadecimal in the encoded string. +// Spaces in 'encoded' separate entire test cases, not individual bytes. +func hexCases(t *testing.T, encoded string) func(func([]byte)) { + return func(try func([]byte)) { + for _, x := range strings.Fields(encoded) { + src, err := hex.DecodeString(x) + if err != nil { + t.Errorf("parsing %q: %v", x, err) + } + try(src) + } + } +} + +// testdataCases generates the test cases recorded in testdata/decode.txt. +// It only uses the inputs; it ignores the answers recorded in that file. +func testdataCases(t *testing.T) func(func([]byte)) { + var codes [][]byte + data, err := ioutil.ReadFile("testdata/decode.txt") + if err != nil { + t.Fatal(err) + } + for _, line := range strings.Split(string(data), "\n") { + line = strings.TrimSpace(line) + if line == "" || strings.HasPrefix(line, "#") { + continue + } + f := strings.Fields(line)[0] + i := strings.Index(f, "|") + if i < 0 { + t.Errorf("parsing %q: missing | separator", f) + continue + } + if i%2 != 0 { + t.Errorf("parsing %q: misaligned | separator", f) + } + code, err := hex.DecodeString(f[:i] + f[i+1:]) + if err != nil { + t.Errorf("parsing %q: %v", f, err) + continue + } + codes = append(codes, code) + } + + return func(try func([]byte)) { + for _, code := range codes { + try(code) + } + } +} + +// manyPrefixes generates all possible 2⁹ combinations of nine chosen prefixes. +// The relative ordering of the prefixes within the combinations varies deterministically. +func manyPrefixes(try func([]byte)) { + var prefixBytes = []byte{0x66, 0x67, 0xF0, 0xF2, 0xF3, 0x3E, 0x36, 0x66, 0x67} + var enc []byte + for i := 0; i < 1< 0 { + k := i % len(enc) + enc[0], enc[k] = enc[k], enc[0] + } + try(enc) + } +} + +// basicPrefixes geneartes 8 different possible prefix cases: no prefix +// and then one each of seven different prefix bytes. +func basicPrefixes(try func([]byte)) { + try(nil) + for _, b := range []byte{0x66, 0x67, 0xF0, 0xF2, 0xF3, 0x3E, 0x36} { + try([]byte{b}) + } +} + +func rexPrefixes(try func([]byte)) { + try(nil) + for _, b := range []byte{0x40, 0x48, 0x43, 0x4C} { + try([]byte{b}) + } +} + +// concat takes two generators and returns a generator for the +// cross product of the two, concatenating the results from each. +func concat(gen1, gen2 func(func([]byte))) func(func([]byte)) { + return func(try func([]byte)) { + gen1(func(enc1 []byte) { + gen2(func(enc2 []byte) { + try(append(enc1[:len(enc1):len(enc1)], enc2...)) + }) + }) + } +} + +// concat3 takes three generators and returns a generator for the +// cross product of the three, concatenating the results from each. +func concat3(gen1, gen2, gen3 func(func([]byte))) func(func([]byte)) { + return func(try func([]byte)) { + gen1(func(enc1 []byte) { + gen2(func(enc2 []byte) { + gen3(func(enc3 []byte) { + try(append(append(enc1[:len(enc1):len(enc1)], enc2...), enc3...)) + }) + }) + }) + } +} + +// concat4 takes four generators and returns a generator for the +// cross product of the four, concatenating the results from each. +func concat4(gen1, gen2, gen3, gen4 func(func([]byte))) func(func([]byte)) { + return func(try func([]byte)) { + gen1(func(enc1 []byte) { + gen2(func(enc2 []byte) { + gen3(func(enc3 []byte) { + gen4(func(enc4 []byte) { + try(append(append(append(enc1[:len(enc1):len(enc1)], enc2...), enc3...), enc4...)) + }) + }) + }) + }) + } +} + +// filter generates the sequences from gen that satisfy ok. +func filter(gen func(func([]byte)), ok func([]byte) bool) func(func([]byte)) { + return func(try func([]byte)) { + gen(func(enc []byte) { + if ok(enc) { + try(enc) + } + }) + } +} + +// enum8bit generates all possible 1-byte sequences, followed by distinctive padding. +func enum8bit(try func([]byte)) { + for i := 0; i < 1<<8; i++ { + try([]byte{byte(i), 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88}) + } +} + +// enum8bit generates all possible 2-byte sequences, followed by distinctive padding. +func enum16bit(try func([]byte)) { + for i := 0; i < 1<<16; i++ { + try([]byte{byte(i), byte(i >> 8), 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88}) + } +} + +// enum24bit generates all possible 3-byte sequences, followed by distinctive padding. +func enum24bit(try func([]byte)) { + for i := 0; i < 1<<24; i++ { + try([]byte{byte(i), byte(i >> 8), byte(i >> 16), 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88}) + } +} + +// enumModRM generates all possible modrm bytes and, for modrm values that indicate +// a following sib byte, all possible modrm, sib combinations. +func enumModRM(try func([]byte)) { + for i := 0; i < 256; i++ { + if (i>>3)&07 == 04 && i>>6 != 3 { // has sib + for j := 0; j < 256; j++ { + try([]byte{0, byte(i), byte(j), 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88}) // byte encodings + try([]byte{1, byte(i), byte(j), 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88}) // word encodings + } + } else { + try([]byte{0, byte(i), 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88}) // byte encodings + try([]byte{1, byte(i), 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88}) // word encodings + } + } +} + +// fixed generates the single case b. +// It's mainly useful to prepare an argument for concat or concat3. +func fixed(b ...byte) func(func([]byte)) { + return func(try func([]byte)) { + try(b) + } +} + +// testBasic runs the given test function with cases all using opcode as the initial opcode bytes. +// It runs three phases: +// +// First, zero-or-one prefixes followed by opcode followed by all possible 1-byte values. +// If in -short mode, that's all. +// +// Second, zero-or-one prefixes followed by opcode followed by all possible 2-byte values. +// If not in -long mode, that's all. This phase and the next run in parallel with other tests +// (using t.Parallel). +// +// Finally, opcode followed by all possible 3-byte values. The test can take a very long time +// and prints progress messages to package log. +func testBasic(t *testing.T, testfn func(*testing.T, func(func([]byte))), opcode ...byte) { + testfn(t, concat3(basicPrefixes, fixed(opcode...), enum8bit)) + if testing.Short() { + return + } + + t.Parallel() + testfn(t, concat3(basicPrefixes, fixed(opcode...), enum16bit)) + if !*longTest { + return + } + + name := caller(2) + op1 := make([]byte, len(opcode)+1) + copy(op1, opcode) + for i := 0; i < 256; i++ { + log.Printf("%s 24-bit: %d/256\n", name, i) + op1[len(opcode)] = byte(i) + testfn(t, concat(fixed(op1...), enum16bit)) + } +} + +func testBasicREX(t *testing.T, testfn func(*testing.T, func(func([]byte))), opcode ...byte) { + testfn(t, filter(concat4(basicPrefixes, rexPrefixes, fixed(opcode...), enum8bit), isValidREX)) + if testing.Short() { + return + } + + t.Parallel() + testfn(t, filter(concat4(basicPrefixes, rexPrefixes, fixed(opcode...), enum16bit), isValidREX)) + if !*longTest { + return + } + + name := caller(2) + op1 := make([]byte, len(opcode)+1) + copy(op1, opcode) + for i := 0; i < 256; i++ { + log.Printf("%s 24-bit: %d/256\n", name, i) + op1[len(opcode)] = byte(i) + testfn(t, filter(concat3(rexPrefixes, fixed(op1...), enum16bit), isValidREX)) + } +} + +// testPrefix runs the given test function for all many prefix possibilities +// followed by all possible 1-byte sequences. +// +// If in -long mode, it then runs a test of all the prefix possibilities followed +// by all possible 2-byte sequences. +func testPrefix(t *testing.T, testfn func(*testing.T, func(func([]byte)))) { + t.Parallel() + testfn(t, concat(manyPrefixes, enum8bit)) + if testing.Short() || !*longTest { + return + } + + name := caller(2) + for i := 0; i < 256; i++ { + log.Printf("%s 16-bit: %d/256\n", name, i) + testfn(t, concat3(manyPrefixes, fixed(byte(i)), enum8bit)) + } +} + +func testPrefixREX(t *testing.T, testfn func(*testing.T, func(func([]byte)))) { + t.Parallel() + testfn(t, filter(concat3(manyPrefixes, rexPrefixes, enum8bit), isValidREX)) + if testing.Short() || !*longTest { + return + } + + name := caller(2) + for i := 0; i < 256; i++ { + log.Printf("%s 16-bit: %d/256\n", name, i) + testfn(t, filter(concat4(manyPrefixes, rexPrefixes, fixed(byte(i)), enum8bit), isValidREX)) + } +} + +func caller(skip int) string { + pc, _, _, _ := runtime.Caller(skip) + f := runtime.FuncForPC(pc) + name := "?" + if f != nil { + name = f.Name() + if i := strings.LastIndex(name, "."); i >= 0 { + name = name[i+1:] + } + } + return name +} + +func isValidREX(x []byte) bool { + i := 0 + for i < len(x) && isPrefixByte(x[i]) { + i++ + } + if i < len(x) && Prefix(x[i]).IsREX() { + i++ + if i < len(x) { + return !isPrefixByte(x[i]) && !Prefix(x[i]).IsREX() + } + } + return true +} + +func isPrefixByte(b byte) bool { + switch b { + case 0x26, 0x2E, 0x36, 0x3E, 0x64, 0x65, 0x66, 0x67, 0xF0, 0xF2, 0xF3: + return true + } + return false +} diff --git a/vendor/golang.org/x/arch/x86/x86asm/format_test.go b/vendor/golang.org/x/arch/x86/x86asm/format_test.go new file mode 100644 index 00000000..9f110f81 --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/format_test.go @@ -0,0 +1,68 @@ +// Copyright 2017 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package x86asm + +import ( + "encoding/hex" + "testing" +) + +func testFormattingSymname(addr uint64) (string, uint64) { + switch addr { + case 0x424080: + return "runtime.printint", 0x424080 + case 0x4c8068: + return "main.A", 0x4c8068 + } + return "", 0 +} + +func TestFormatting(t *testing.T) { + testCases := []struct { + PC uint64 + bytes string + + goSyntax, intelSyntax, gnuSyntax string + }{ + {0x4816b2, "0f8677010000", + "JBE 0x48182f", + "jbe 0x48182f", + "jbe 0x48182f"}, + {0x45065b, "488b442408", + "MOVQ 0x8(SP), AX", + "mov rax, qword ptr [rsp+0x8]", + "mov 0x8(%rsp),%rax"}, + {0x450678, "488b05e9790700", + "MOVQ main.A(SB), AX", + "mov rax, qword ptr [main.A]", + "mov main.A,%rax"}, + {0x450664, "e8173afdff", + "CALL runtime.printint(SB)", + "call runtime.printint", + "callq runtime.printint"}, + {0x45069b, "488d0575d90100", + "LEAQ 0x1d975(IP), AX", + "lea rax, ptr [rip+0x1d975]", + "lea 0x1d975(%rip),%rax"}, + } + + for _, testCase := range testCases { + t.Logf("%#x %s %s", testCase.PC, testCase.bytes, testCase.goSyntax) + bs, _ := hex.DecodeString(testCase.bytes) + inst, err := Decode(bs, 64) + if err != nil { + t.Errorf("decode error %v", err) + } + if out := GoSyntax(inst, testCase.PC, testFormattingSymname); out != testCase.goSyntax { + t.Errorf("GoSyntax: %q", out) + } + if out := IntelSyntax(inst, testCase.PC, testFormattingSymname); out != testCase.intelSyntax { + t.Errorf("IntelSyntax: %q expected: %q", out, testCase.intelSyntax) + } + if out := GNUSyntax(inst, testCase.PC, testFormattingSymname); out != testCase.gnuSyntax { + t.Errorf("GNUSyntax: %q expected: %q", out, testCase.gnuSyntax) + } + } +} diff --git a/vendor/golang.org/x/arch/x86/x86asm/gnu.go b/vendor/golang.org/x/arch/x86/x86asm/gnu.go index 728e5d18..75cff72b 100644 --- a/vendor/golang.org/x/arch/x86/x86asm/gnu.go +++ b/vendor/golang.org/x/arch/x86/x86asm/gnu.go @@ -11,12 +11,16 @@ import ( // GNUSyntax returns the GNU assembler syntax for the instruction, as defined by GNU binutils. // This general form is often called ``AT&T syntax'' as a reference to AT&T System V Unix. -func GNUSyntax(inst Inst) string { +func GNUSyntax(inst Inst, pc uint64, symname SymLookup) string { // Rewrite instruction to mimic GNU peculiarities. // Note that inst has been passed by value and contains // no pointers, so any changes we make here are local // and will not propagate back out to the caller. + if symname == nil { + symname = func(uint64) (string, uint64) { return "", 0 } + } + // Adjust opcode [sic]. switch inst.Op { case FDIV, FDIVR, FSUB, FSUBR, FDIVP, FDIVRP, FSUBP, FSUBRP: @@ -403,7 +407,7 @@ SuffixLoop: if a == Imm(1) && (inst.Opcode>>24)&^1 == 0xD0 { continue } - args = append(args, gnuArg(&inst, a, &usedPrefixes)) + args = append(args, gnuArg(&inst, pc, symname, a, &usedPrefixes)) } // The default is to print the arguments in reverse Intel order. @@ -513,7 +517,7 @@ SuffixLoop: // gnuArg returns the GNU syntax for the argument x from the instruction inst. // If *usedPrefixes is false and x is a Mem, then the formatting // includes any segment prefixes and sets *usedPrefixes to true. -func gnuArg(inst *Inst, x Arg, usedPrefixes *bool) string { +func gnuArg(inst *Inst, pc uint64, symname SymLookup, x Arg, usedPrefixes *bool) string { if x == nil { return "" } @@ -535,6 +539,13 @@ func gnuArg(inst *Inst, x Arg, usedPrefixes *bool) string { } return gccRegName[x] case Mem: + if s, disp := memArgToSymbol(x, pc, inst.Len, symname); s != "" { + suffix := "" + if disp != 0 { + suffix = fmt.Sprintf("%+d", disp) + } + return fmt.Sprintf("%s%s", s, suffix) + } seg := "" var haveCS, haveDS, haveES, haveFS, haveGS, haveSS bool switch x.Segment { @@ -644,8 +655,25 @@ func gnuArg(inst *Inst, x Arg, usedPrefixes *bool) string { } return fmt.Sprintf("%s%s(%s,%s,%d)", seg, disp, base, index, x.Scale) case Rel: - return fmt.Sprintf(".%+#x", int32(x)) + if pc == 0 { + return fmt.Sprintf(".%+#x", int64(x)) + } else { + addr := pc + uint64(inst.Len) + uint64(x) + if s, base := symname(addr); s != "" && addr == base { + return fmt.Sprintf("%s", s) + } else { + addr := pc + uint64(inst.Len) + uint64(x) + return fmt.Sprintf("%#x", addr) + } + } case Imm: + if s, base := symname(uint64(x)); s != "" { + suffix := "" + if uint64(x) != base { + suffix = fmt.Sprintf("%+d", uint64(x)-base) + } + return fmt.Sprintf("$%s%s", s, suffix) + } if inst.Mode == 32 { return fmt.Sprintf("$%#x", uint32(x)) } diff --git a/vendor/golang.org/x/arch/x86/x86asm/inst_test.go b/vendor/golang.org/x/arch/x86/x86asm/inst_test.go new file mode 100644 index 00000000..23ac5232 --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/inst_test.go @@ -0,0 +1,20 @@ +// Copyright 2014 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package x86asm + +import ( + "strings" + "testing" +) + +func TestRegString(t *testing.T) { + for r := Reg(1); r <= regMax; r++ { + if regNames[r] == "" { + t.Errorf("regNames[%d] is missing", int(r)) + } else if s := r.String(); strings.Contains(s, "Reg(") { + t.Errorf("Reg(%d).String() = %s, want proper name", int(r), s) + } + } +} diff --git a/vendor/golang.org/x/arch/x86/x86asm/intel.go b/vendor/golang.org/x/arch/x86/x86asm/intel.go index 63fa2cfc..472eabda 100644 --- a/vendor/golang.org/x/arch/x86/x86asm/intel.go +++ b/vendor/golang.org/x/arch/x86/x86asm/intel.go @@ -10,7 +10,11 @@ import ( ) // IntelSyntax returns the Intel assembler syntax for the instruction, as defined by Intel's XED tool. -func IntelSyntax(inst Inst) string { +func IntelSyntax(inst Inst, pc uint64, symname SymLookup) string { + if symname == nil { + symname = func(uint64) (string, uint64) { return "", 0 } + } + var iargs []Arg for _, a := range inst.Args { if a == nil { @@ -256,7 +260,7 @@ func IntelSyntax(inst Inst) string { if a == nil { break } - args = append(args, intelArg(&inst, a)) + args = append(args, intelArg(&inst, pc, symname, a)) } var op string @@ -334,9 +338,16 @@ func IntelSyntax(inst Inst) string { return prefix + op } -func intelArg(inst *Inst, arg Arg) string { +func intelArg(inst *Inst, pc uint64, symname SymLookup, arg Arg) string { switch a := arg.(type) { case Imm: + if s, base := symname(uint64(a)); s != "" { + suffix := "" + if uint64(a) != base { + suffix = fmt.Sprintf("%+d", uint64(a)-base) + } + return fmt.Sprintf("$%s%s", s, suffix) + } if inst.Mode == 32 { return fmt.Sprintf("%#x", uint32(a)) } @@ -417,18 +428,25 @@ func intelArg(inst *Inst, arg Arg) string { } prefix += "ptr " + if s, disp := memArgToSymbol(a, pc, inst.Len, symname); s != "" { + suffix := "" + if disp != 0 { + suffix = fmt.Sprintf("%+d", disp) + } + return prefix + fmt.Sprintf("[%s%s]", s, suffix) + } if a.Segment != 0 { prefix += strings.ToLower(a.Segment.String()) + ":" } prefix += "[" if a.Base != 0 { - prefix += intelArg(inst, a.Base) + prefix += intelArg(inst, pc, symname, a.Base) } if a.Scale != 0 && a.Index != 0 { if a.Base != 0 { prefix += "+" } - prefix += fmt.Sprintf("%s*%d", intelArg(inst, a.Index), a.Scale) + prefix += fmt.Sprintf("%s*%d", intelArg(inst, pc, symname, a.Index), a.Scale) } if a.Disp != 0 { if prefix[len(prefix)-1] == '[' && (a.Disp >= 0 || int64(int32(a.Disp)) != a.Disp) { @@ -440,7 +458,17 @@ func intelArg(inst *Inst, arg Arg) string { prefix += "]" return prefix case Rel: - return fmt.Sprintf(".%+#x", int64(a)) + if pc == 0 { + return fmt.Sprintf(".%+#x", int64(a)) + } else { + addr := pc + uint64(inst.Len) + uint64(a) + if s, base := symname(addr); s != "" && addr == base { + return fmt.Sprintf("%s", s) + } else { + addr := pc + uint64(inst.Len) + uint64(a) + return fmt.Sprintf("%#x", addr) + } + } case Reg: if int(a) < len(intelReg) && intelReg[a] != "" { switch inst.Op { diff --git a/vendor/golang.org/x/arch/x86/x86asm/objdump_test.go b/vendor/golang.org/x/arch/x86/x86asm/objdump_test.go new file mode 100644 index 00000000..3d4e1460 --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/objdump_test.go @@ -0,0 +1,385 @@ +// Copyright 2014 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package x86asm + +import ( + "bytes" + "strings" + "testing" +) + +func TestObjdump32Manual(t *testing.T) { testObjdump32(t, hexCases(t, objdumpManualTests)) } +func TestObjdump32Testdata(t *testing.T) { testObjdump32(t, concat(basicPrefixes, testdataCases(t))) } +func TestObjdump32ModRM(t *testing.T) { testObjdump32(t, concat(basicPrefixes, enumModRM)) } +func TestObjdump32OneByte(t *testing.T) { testBasic(t, testObjdump32) } +func TestObjdump320F(t *testing.T) { testBasic(t, testObjdump32, 0x0F) } +func TestObjdump320F38(t *testing.T) { testBasic(t, testObjdump32, 0x0F, 0x38) } +func TestObjdump320F3A(t *testing.T) { testBasic(t, testObjdump32, 0x0F, 0x3A) } +func TestObjdump32Prefix(t *testing.T) { testPrefix(t, testObjdump32) } + +func TestObjdump64Manual(t *testing.T) { testObjdump64(t, hexCases(t, objdumpManualTests)) } +func TestObjdump64Testdata(t *testing.T) { testObjdump64(t, concat(basicPrefixes, testdataCases(t))) } +func TestObjdump64ModRM(t *testing.T) { testObjdump64(t, concat(basicPrefixes, enumModRM)) } +func TestObjdump64OneByte(t *testing.T) { testBasic(t, testObjdump64) } +func TestObjdump640F(t *testing.T) { testBasic(t, testObjdump64, 0x0F) } +func TestObjdump640F38(t *testing.T) { testBasic(t, testObjdump64, 0x0F, 0x38) } +func TestObjdump640F3A(t *testing.T) { testBasic(t, testObjdump64, 0x0F, 0x3A) } +func TestObjdump64Prefix(t *testing.T) { testPrefix(t, testObjdump64) } + +func TestObjdump64REXTestdata(t *testing.T) { + testObjdump64(t, filter(concat3(basicPrefixes, rexPrefixes, testdataCases(t)), isValidREX)) +} +func TestObjdump64REXModRM(t *testing.T) { + testObjdump64(t, concat3(basicPrefixes, rexPrefixes, enumModRM)) +} +func TestObjdump64REXOneByte(t *testing.T) { testBasicREX(t, testObjdump64) } +func TestObjdump64REX0F(t *testing.T) { testBasicREX(t, testObjdump64, 0x0F) } +func TestObjdump64REX0F38(t *testing.T) { testBasicREX(t, testObjdump64, 0x0F, 0x38) } +func TestObjdump64REX0F3A(t *testing.T) { testBasicREX(t, testObjdump64, 0x0F, 0x3A) } +func TestObjdump64REXPrefix(t *testing.T) { testPrefixREX(t, testObjdump64) } + +// objdumpManualTests holds test cases that will be run by TestObjdumpManual. +// If you are debugging a few cases that turned up in a longer run, it can be useful +// to list them here and then use -run=ObjdumpManual, particularly with tracing enabled. +var objdumpManualTests = ` +4883FE017413 +488DFC2500000000 +488D3D00000000 +` + +// allowedMismatchObjdump reports whether the mismatch between text and dec +// should be allowed by the test. +func allowedMismatchObjdump(text string, size int, inst *Inst, dec ExtInst) bool { + if size == 15 && dec.nenc == 15 && contains(text, "truncated") && contains(dec.text, "(bad)") { + return true + } + + if i := strings.LastIndex(dec.text, " "); isPrefix(dec.text[i+1:]) && size == 1 && isPrefix(text) { + return true + } + + if size == dec.nenc && contains(dec.text, "movupd") && contains(dec.text, "data32") { + s := strings.Replace(dec.text, "data32 ", "", -1) + if text == s { + return true + } + } + + // Simplify our invalid instruction text. + if text == "error: unrecognized instruction" { + text = "BAD" + } + + // Invalid instructions for which libopcodes prints %? register. + // FF E8 11 22 33 44: + // Invalid instructions for which libopcodes prints "internal disassembler error". + // Invalid instructions for which libopcodes prints 8087 only (e.g., DB E0) + // or prints 287 only (e.g., DB E4). + if contains(dec.text, "%?", "", "(8087 only)", "(287 only)") { + dec.text = "(bad)" + } + + // 0F 19 11, 0F 1C 11, 0F 1D 11, 0F 1E 11, 0F 1F 11: libopcodes says nop, + // but the Intel manuals say that the only NOP there is 0F 1F /0. + // Perhaps libopcodes is reporting an older encoding. + i := bytes.IndexByte(dec.enc[:], 0x0F) + if contains(dec.text, "nop") && i >= 0 && i+2 < len(dec.enc) && dec.enc[i+1]&^7 == 0x18 && (dec.enc[i+1] != 0x1F || (dec.enc[i+2]>>3)&7 != 0) { + dec.text = "(bad)" + } + + // Any invalid instruction. + if text == "BAD" && contains(dec.text, "(bad)") { + return true + } + + // Instructions libopcodes knows but we do not (e.g., 0F 19 11). + if (text == "BAD" || size == 1 && isPrefix(text)) && hasPrefix(dec.text, unsupported...) { + return true + } + + // Instructions we know but libopcodes does not (e.g., 0F D0 11). + if (contains(dec.text, "(bad)") || dec.nenc == 1 && isPrefix(dec.text)) && hasPrefix(text, libopcodesUnsupported...) { + return true + } + + // Libopcodes rejects F2 90 as NOP. Not sure why. + if (contains(dec.text, "(bad)") || dec.nenc == 1 && isPrefix(dec.text)) && inst.Opcode>>24 == 0x90 && countPrefix(inst, 0xF2) > 0 { + return true + } + + // 0F 20 11, 0F 21 11, 0F 22 11, 0F 23 11, 0F 24 11: + // Moves into and out of some control registers seem to be unsupported by libopcodes. + // TODO(rsc): Are they invalid somehow? + if (contains(dec.text, "(bad)") || dec.nenc == 1 && isPrefix(dec.text)) && contains(text, "%cr", "%db", "%tr") { + return true + } + + if contains(dec.text, "fwait") && dec.nenc == 1 && dec.enc[0] != 0x9B { + return true + } + + // 9B D9 11: libopcodes reports FSTSW instead of FWAIT + FNSTSW. + // This is correct in that FSTSW is a pseudo-op for the pair, but it really + // is a pair of instructions: execution can stop between them. + // Our decoder chooses to separate them. + if (text == "fwait" || strings.HasSuffix(text, " fwait")) && dec.nenc >= len(strings.Fields(text)) && dec.enc[len(strings.Fields(text))-1] == 0x9B { + return true + } + + // 0F 18 77 11: + // Invalid instructions for which libopcodes prints "nop/reserved". + // Perhaps libopcodes is reporting an older encoding. + if text == "BAD" && contains(dec.text, "nop/reserved") { + return true + } + + // 0F C7 B0 11 22 33 44: libopcodes says vmptrld 0x44332211(%eax); we say rdrand %eax. + // TODO(rsc): Fix, since we are probably wrong, but we don't have vmptrld in the manual. + if contains(text, "rdrand") && contains(dec.text, "vmptrld", "vmxon", "vmclear") { + return true + } + + // DD C8: libopcodes says FNOP but the Intel manual is clear FNOP is only D9 D0. + // Perhaps libopcodes is reporting an older encoding. + if text == "BAD" && contains(dec.text, "fnop") && (dec.enc[0] != 0xD9 || dec.enc[1] != 0xD0) { + return true + } + + // 66 90: libopcodes says xchg %ax,%ax; we say 'data16 nop'. + // The 16-bit swap will preserve the high bits of the register, + // so they are the same. + if contains(text, "nop") && contains(dec.text, "xchg %ax,%ax") { + return true + } + + // If there are multiple prefixes, allow libopcodes to use an alternate name. + if size == 1 && dec.nenc == 1 && prefixByte[text] > 0 && prefixByte[text] == prefixByte[dec.text] { + return true + } + + // 26 9B: libopcodes reports "fwait"/1, ignoring segment prefix. + // https://sourceware.org/bugzilla/show_bug.cgi?id=16891 + // F0 82: Decode="lock"/1 but libopcodes="lock (bad)"/2. + if size == 1 && dec.nenc >= 1 && prefixByte[text] == dec.enc[0] && contains(dec.text, "(bad)", "fwait", "fnop") { + return true + } + + // libopcodes interprets 660f801122 as taking a rel16 but + // truncating the address at 16 bits. Not sure what is correct. + if contains(text, ".+0x2211", ".+0x11") && contains(dec.text, " .-") { + return true + } + + // 66 F3 0F D6 C5, 66 F2 0F D6 C0: libopcodes reports use of XMM register instead of MMX register, + // but only when the instruction has a 66 prefix. Maybe they know something we don't. + if countPrefix(inst, 0x66) > 0 && contains(dec.text, "movdq2q", "movq2dq") && !contains(dec.text, "%mm") { + return true + } + + // 0F 01 F8, 0F 05, 0F 07: these are 64-bit instructions but libopcodes accepts them. + if (text == "BAD" || size == 1 && isPrefix(text)) && contains(dec.text, "swapgs", "syscall", "sysret", "rdfsbase", "rdgsbase", "wrfsbase", "wrgsbase") { + return true + } + + return false +} + +// Instructions known to libopcodes (or xed) but not to us. +// Most of these come from supplementary manuals of one form or another. +var unsupported = strings.Fields(` + bndc + bndl + bndm + bnds + clac + clgi + femms + fldln + fldz + getsec + invlpga + kmov + montmul + pavg + pf2i + pfacc + pfadd + pfcmp + pfmax + pfmin + pfmul + pfna + pfpnac + pfrc + pfrs + pfsub + phadd + phsub + pi2f + pmulhr + prefetch + pswap + ptest + rdseed + sha1 + sha256 + skinit + stac + stgi + vadd + vand + vcmp + vcomis + vcvt + vcvt + vdiv + vhadd + vhsub + vld + vmax + vmcall + vmfunc + vmin + vmlaunch + vmload + vmmcall + vmov + vmov + vmov + vmptrld + vmptrst + vmread + vmresume + vmrun + vmsave + vmul + vmwrite + vmxoff + vor + vpack + vpadd + vpand + vpavg + vpcmp + vpcmp + vpins + vpmadd + vpmax + vpmin + vpmul + vpmul + vpor + vpsad + vpshuf + vpsll + vpsra + vpsrad + vpsrl + vpsub + vpunp + vpxor + vrcp + vrsqrt + vshuf + vsqrt + vsub + vucomis + vunp + vxor + vzero + xcrypt + xsha1 + xsha256 + xstore-rng + insertq + extrq + vmclear + invvpid + adox + vmxon + invept + adcx + vmclear + prefetchwt1 + enclu + encls + salc + fstpnce + fdisi8087_nop + fsetpm287_nop + feni8087_nop + syscall + sysret +`) + +// Instructions known to us but not to libopcodes (at least in binutils 2.24). +var libopcodesUnsupported = strings.Fields(` + addsubps + aes + blend + cvttpd2dq + dpp + extract + haddps + hsubps + insert + invpcid + lddqu + movmsk + movnt + movq2dq + mps + pack + pblend + pclmul + pcmp + pext + phmin + pins + pmax + pmin + pmov + pmovmsk + pmul + popcnt + pslld + psllq + psllw + psrad + psraw + psrl + ptest + punpck + round + xrstor + xsavec + xsaves + comis + ucomis + movhps + movntps + rsqrt + rcpp + puncpck + bsf + movq2dq + cvttpd2dq + movq + hsubpd + movdqa + movhpd + addsubpd + movd + haddpd + cvtps2dq + bsr + cvtdq2ps + rdrand + maskmov + movq2dq + movlhps + movbe + movlpd +`) diff --git a/vendor/golang.org/x/arch/x86/x86asm/objdumpext_test.go b/vendor/golang.org/x/arch/x86/x86asm/objdumpext_test.go new file mode 100644 index 00000000..f720dc6c --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/objdumpext_test.go @@ -0,0 +1,313 @@ +// Copyright 2014 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package x86asm + +import ( + "bytes" + "debug/elf" + "encoding/binary" + "fmt" + "io" + "log" + "os" + "strconv" + "strings" + "testing" +) + +// Apologies for the proprietary path, but we need objdump 2.24 + some committed patches that will land in 2.25. +const objdumpPath = "/Users/rsc/bin/objdump2" + +func testObjdump32(t *testing.T, generate func(func([]byte))) { + testObjdumpArch(t, generate, 32) +} + +func testObjdump64(t *testing.T, generate func(func([]byte))) { + testObjdumpArch(t, generate, 64) +} + +func testObjdumpArch(t *testing.T, generate func(func([]byte)), arch int) { + if testing.Short() { + t.Skip("skipping objdump test in short mode") + } + if _, err := os.Stat(objdumpPath); err != nil { + t.Skip(err) + } + + testExtDis(t, "gnu", arch, objdump, generate, allowedMismatchObjdump) +} + +func objdump(ext *ExtDis) error { + // File already written with instructions; add ELF header. + if ext.Arch == 32 { + if err := writeELF32(ext.File, ext.Size); err != nil { + return err + } + } else { + if err := writeELF64(ext.File, ext.Size); err != nil { + return err + } + } + + b, err := ext.Run(objdumpPath, "-d", "-z", ext.File.Name()) + if err != nil { + return err + } + + var ( + nmatch int + reading bool + next uint32 = start + addr uint32 + encbuf [32]byte + enc []byte + text string + ) + flush := func() { + if addr == next { + switch text { + case "repz": + text = "rep" + case "repnz": + text = "repn" + default: + text = strings.Replace(text, "repz ", "rep ", -1) + text = strings.Replace(text, "repnz ", "repn ", -1) + } + if m := pcrelw.FindStringSubmatch(text); m != nil { + targ, _ := strconv.ParseUint(m[2], 16, 64) + text = fmt.Sprintf("%s .%+#x", m[1], int16(uint32(targ)-uint32(uint16(addr))-uint32(len(enc)))) + } + if m := pcrel.FindStringSubmatch(text); m != nil { + targ, _ := strconv.ParseUint(m[2], 16, 64) + text = fmt.Sprintf("%s .%+#x", m[1], int32(uint32(targ)-addr-uint32(len(enc)))) + } + text = strings.Replace(text, "0x0(", "(", -1) + text = strings.Replace(text, "%st(0)", "%st", -1) + + ext.Dec <- ExtInst{addr, encbuf, len(enc), text} + encbuf = [32]byte{} + enc = nil + next += 32 + } + } + var textangle = []byte("<.text>:") + for { + line, err := b.ReadSlice('\n') + if err != nil { + if err == io.EOF { + break + } + return fmt.Errorf("reading objdump output: %v", err) + } + if bytes.Contains(line, textangle) { + reading = true + continue + } + if !reading { + continue + } + if debug { + os.Stdout.Write(line) + } + if enc1 := parseContinuation(line, encbuf[:len(enc)]); enc1 != nil { + enc = enc1 + continue + } + flush() + nmatch++ + addr, enc, text = parseLine(line, encbuf[:0]) + if addr > next { + return fmt.Errorf("address out of sync expected <= %#x at %q in:\n%s", next, line, line) + } + } + flush() + if next != start+uint32(ext.Size) { + return fmt.Errorf("not enough results found [%d %d]", next, start+ext.Size) + } + if err := ext.Wait(); err != nil { + return fmt.Errorf("exec: %v", err) + } + + return nil +} + +func parseLine(line []byte, encstart []byte) (addr uint32, enc []byte, text string) { + oline := line + i := index(line, ":\t") + if i < 0 { + log.Fatalf("cannot parse disassembly: %q", oline) + } + x, err := strconv.ParseUint(string(trimSpace(line[:i])), 16, 32) + if err != nil { + log.Fatalf("cannot parse disassembly: %q", oline) + } + addr = uint32(x) + line = line[i+2:] + i = bytes.IndexByte(line, '\t') + if i < 0 { + log.Fatalf("cannot parse disassembly: %q", oline) + } + enc, ok := parseHex(line[:i], encstart) + if !ok { + log.Fatalf("cannot parse disassembly: %q", oline) + } + line = trimSpace(line[i:]) + if i := bytes.IndexByte(line, '#'); i >= 0 { + line = trimSpace(line[:i]) + } + text = string(fixSpace(line)) + return +} + +func parseContinuation(line []byte, enc []byte) []byte { + i := index(line, ":\t") + if i < 0 { + return nil + } + line = line[i+1:] + enc, _ = parseHex(line, enc) + return enc +} + +// writeELF32 writes an ELF32 header to the file, +// describing a text segment that starts at start +// and extends for size bytes. +func writeELF32(f *os.File, size int) error { + f.Seek(0, 0) + var hdr elf.Header32 + var prog elf.Prog32 + var sect elf.Section32 + var buf bytes.Buffer + binary.Write(&buf, binary.LittleEndian, &hdr) + off1 := buf.Len() + binary.Write(&buf, binary.LittleEndian, &prog) + off2 := buf.Len() + binary.Write(&buf, binary.LittleEndian, §) + off3 := buf.Len() + buf.Reset() + data := byte(elf.ELFDATA2LSB) + hdr = elf.Header32{ + Ident: [16]byte{0x7F, 'E', 'L', 'F', 1, data, 1}, + Type: 2, + Machine: uint16(elf.EM_386), + Version: 1, + Entry: start, + Phoff: uint32(off1), + Shoff: uint32(off2), + Flags: 0x05000002, + Ehsize: uint16(off1), + Phentsize: uint16(off2 - off1), + Phnum: 1, + Shentsize: uint16(off3 - off2), + Shnum: 3, + Shstrndx: 2, + } + binary.Write(&buf, binary.LittleEndian, &hdr) + prog = elf.Prog32{ + Type: 1, + Off: start, + Vaddr: start, + Paddr: start, + Filesz: uint32(size), + Memsz: uint32(size), + Flags: 5, + Align: start, + } + binary.Write(&buf, binary.LittleEndian, &prog) + binary.Write(&buf, binary.LittleEndian, §) // NULL section + sect = elf.Section32{ + Name: 1, + Type: uint32(elf.SHT_PROGBITS), + Addr: start, + Off: start, + Size: uint32(size), + Flags: uint32(elf.SHF_ALLOC | elf.SHF_EXECINSTR), + Addralign: 4, + } + binary.Write(&buf, binary.LittleEndian, §) // .text + sect = elf.Section32{ + Name: uint32(len("\x00.text\x00")), + Type: uint32(elf.SHT_STRTAB), + Addr: 0, + Off: uint32(off2 + (off3-off2)*3), + Size: uint32(len("\x00.text\x00.shstrtab\x00")), + Addralign: 1, + } + binary.Write(&buf, binary.LittleEndian, §) + buf.WriteString("\x00.text\x00.shstrtab\x00") + f.Write(buf.Bytes()) + return nil +} + +// writeELF64 writes an ELF64 header to the file, +// describing a text segment that starts at start +// and extends for size bytes. +func writeELF64(f *os.File, size int) error { + f.Seek(0, 0) + var hdr elf.Header64 + var prog elf.Prog64 + var sect elf.Section64 + var buf bytes.Buffer + binary.Write(&buf, binary.LittleEndian, &hdr) + off1 := buf.Len() + binary.Write(&buf, binary.LittleEndian, &prog) + off2 := buf.Len() + binary.Write(&buf, binary.LittleEndian, §) + off3 := buf.Len() + buf.Reset() + data := byte(elf.ELFDATA2LSB) + hdr = elf.Header64{ + Ident: [16]byte{0x7F, 'E', 'L', 'F', 2, data, 1}, + Type: 2, + Machine: uint16(elf.EM_X86_64), + Version: 1, + Entry: start, + Phoff: uint64(off1), + Shoff: uint64(off2), + Flags: 0x05000002, + Ehsize: uint16(off1), + Phentsize: uint16(off2 - off1), + Phnum: 1, + Shentsize: uint16(off3 - off2), + Shnum: 3, + Shstrndx: 2, + } + binary.Write(&buf, binary.LittleEndian, &hdr) + prog = elf.Prog64{ + Type: 1, + Off: start, + Vaddr: start, + Paddr: start, + Filesz: uint64(size), + Memsz: uint64(size), + Flags: 5, + Align: start, + } + binary.Write(&buf, binary.LittleEndian, &prog) + binary.Write(&buf, binary.LittleEndian, §) // NULL section + sect = elf.Section64{ + Name: 1, + Type: uint32(elf.SHT_PROGBITS), + Addr: start, + Off: start, + Size: uint64(size), + Flags: uint64(elf.SHF_ALLOC | elf.SHF_EXECINSTR), + Addralign: 4, + } + binary.Write(&buf, binary.LittleEndian, §) // .text + sect = elf.Section64{ + Name: uint32(len("\x00.text\x00")), + Type: uint32(elf.SHT_STRTAB), + Addr: 0, + Off: uint64(off2 + (off3-off2)*3), + Size: uint64(len("\x00.text\x00.shstrtab\x00")), + Addralign: 1, + } + binary.Write(&buf, binary.LittleEndian, §) + buf.WriteString("\x00.text\x00.shstrtab\x00") + f.Write(buf.Bytes()) + return nil +} diff --git a/vendor/golang.org/x/arch/x86/x86asm/plan9ext_test.go b/vendor/golang.org/x/arch/x86/x86asm/plan9ext_test.go new file mode 100644 index 00000000..9bd296cf --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/plan9ext_test.go @@ -0,0 +1,119 @@ +// Copyright 2014 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package x86asm + +import ( + "bytes" + "fmt" + "io" + "log" + "os" + "strconv" + "testing" +) + +const plan9Path = "testdata/libmach8db" + +func testPlan9Arch(t *testing.T, arch int, generate func(func([]byte))) { + if testing.Short() { + t.Skip("skipping libmach test in short mode") + } + if _, err := os.Stat(plan9Path); err != nil { + t.Skip(err) + } + + testExtDis(t, "plan9", arch, plan9, generate, allowedMismatchPlan9) +} + +func testPlan932(t *testing.T, generate func(func([]byte))) { + testPlan9Arch(t, 32, generate) +} + +func testPlan964(t *testing.T, generate func(func([]byte))) { + testPlan9Arch(t, 64, generate) +} + +func plan9(ext *ExtDis) error { + flag := "-8" + if ext.Arch == 64 { + flag = "-6" + } + b, err := ext.Run(plan9Path, flag, ext.File.Name()) + if err != nil { + return err + } + + nmatch := 0 + next := uint32(start) + var ( + addr uint32 + encbuf [32]byte + enc []byte + text string + ) + + for { + line, err := b.ReadSlice('\n') + if err != nil { + if err == io.EOF { + break + } + return fmt.Errorf("reading libmach8db output: %v", err) + } + if debug { + os.Stdout.Write(line) + } + nmatch++ + addr, enc, text = parseLinePlan9(line, encbuf[:0]) + if addr > next { + return fmt.Errorf("address out of sync expected <= %#x at %q in:\n%s", next, line, line) + } + if addr < next { + continue + } + if m := pcrelw.FindStringSubmatch(text); m != nil { + targ, _ := strconv.ParseUint(m[2], 16, 64) + text = fmt.Sprintf("%s .%+#x", m[1], int16(uint32(targ)-uint32(uint16(addr))-uint32(len(enc)))) + } + if m := pcrel.FindStringSubmatch(text); m != nil { + targ, _ := strconv.ParseUint(m[2], 16, 64) + text = fmt.Sprintf("%s .%+#x", m[1], int32(uint32(targ)-addr-uint32(len(enc)))) + } + ext.Dec <- ExtInst{addr, encbuf, len(enc), text} + encbuf = [32]byte{} + enc = nil + next += 32 + } + if next != start+uint32(ext.Size) { + return fmt.Errorf("not enough results found [%d %d]", next, start+ext.Size) + } + if err := ext.Wait(); err != nil { + return fmt.Errorf("exec: %v", err) + } + + return nil +} + +func parseLinePlan9(line []byte, encstart []byte) (addr uint32, enc []byte, text string) { + i := bytes.IndexByte(line, ' ') + if i < 0 || line[0] != '0' || line[1] != 'x' { + log.Fatalf("cannot parse disassembly: %q", line) + } + j := bytes.IndexByte(line[i+1:], ' ') + if j < 0 { + log.Fatalf("cannot parse disassembly: %q", line) + } + j += i + 1 + x, err := strconv.ParseUint(string(trimSpace(line[2:i])), 16, 32) + if err != nil { + log.Fatalf("cannot parse disassembly: %q", line) + } + addr = uint32(x) + enc, ok := parseHex(line[i+1:j], encstart) + if !ok { + log.Fatalf("cannot parse disassembly: %q", line) + } + return addr, enc, string(fixSpace(line[j+1:])) +} diff --git a/vendor/golang.org/x/arch/x86/x86asm/plan9x.go b/vendor/golang.org/x/arch/x86/x86asm/plan9x.go index 41cfc08f..a93bffd4 100644 --- a/vendor/golang.org/x/arch/x86/x86asm/plan9x.go +++ b/vendor/golang.org/x/arch/x86/x86asm/plan9x.go @@ -9,6 +9,8 @@ import ( "strings" ) +type SymLookup func(uint64) (string, uint64) + // GoSyntax returns the Go assembler syntax for the instruction. // The syntax was originally defined by Plan 9. // The pc is the program counter of the instruction, used for expanding @@ -16,7 +18,7 @@ import ( // The symname function queries the symbol table for the program // being disassembled. Given a target address it returns the name and base // address of the symbol containing the target, if any; otherwise it returns "", 0. -func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64)) string { +func GoSyntax(inst Inst, pc uint64, symname SymLookup) string { if symname == nil { symname = func(uint64) (string, uint64) { return "", 0 } } @@ -119,14 +121,12 @@ func plan9Arg(inst *Inst, pc uint64, symname func(uint64) (string, uint64), arg } return fmt.Sprintf("$%#x", uint64(a)) case Mem: - if a.Segment == 0 && a.Disp != 0 && a.Base == 0 && (a.Index == 0 || a.Scale == 0) { - if s, base := symname(uint64(a.Disp)); s != "" { - suffix := "" - if uint64(a.Disp) != base { - suffix = fmt.Sprintf("%+d", uint64(a.Disp)-base) - } - return fmt.Sprintf("%s%s(SB)", s, suffix) + if s, disp := memArgToSymbol(a, pc, inst.Len, symname); s != "" { + suffix := "" + if disp != 0 { + suffix = fmt.Sprintf("%+d", disp) } + return fmt.Sprintf("%s%s(SB)", s, suffix) } s := "" if a.Segment != 0 { @@ -148,6 +148,25 @@ func plan9Arg(inst *Inst, pc uint64, symname func(uint64) (string, uint64), arg return arg.String() } +func memArgToSymbol(a Mem, pc uint64, instrLen int, symname SymLookup) (string, int64) { + if a.Segment != 0 || a.Disp == 0 || a.Index != 0 || a.Scale != 0 { + return "", 0 + } + + var disp uint64 + switch a.Base { + case IP, EIP, RIP: + disp = uint64(a.Disp + int64(pc) + int64(instrLen)) + case 0: + disp = uint64(a.Disp) + default: + return "", 0 + } + + s, base := symname(disp) + return s, int64(disp) - int64(base) +} + var plan9Suffix = [maxOp + 1]bool{ ADC: true, ADD: true, diff --git a/vendor/golang.org/x/arch/x86/x86asm/plan9x_test.go b/vendor/golang.org/x/arch/x86/x86asm/plan9x_test.go new file mode 100644 index 00000000..f2ea28cd --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/plan9x_test.go @@ -0,0 +1,54 @@ +// Copyright 2014 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package x86asm + +import ( + "strings" + "testing" +) + +func TestPlan932Manual(t *testing.T) { testPlan932(t, hexCases(t, plan9ManualTests)) } +func TestPlan932Testdata(t *testing.T) { testPlan932(t, concat(basicPrefixes, testdataCases(t))) } +func TestPlan932ModRM(t *testing.T) { testPlan932(t, concat(basicPrefixes, enumModRM)) } +func TestPlan932OneByte(t *testing.T) { testBasic(t, testPlan932) } +func TestPlan9320F(t *testing.T) { testBasic(t, testPlan932, 0x0F) } +func TestPlan9320F38(t *testing.T) { testBasic(t, testPlan932, 0x0F, 0x38) } +func TestPlan9320F3A(t *testing.T) { testBasic(t, testPlan932, 0x0F, 0x3A) } +func TestPlan932Prefix(t *testing.T) { testPrefix(t, testPlan932) } + +func TestPlan964Manual(t *testing.T) { testPlan964(t, hexCases(t, plan9ManualTests)) } +func TestPlan964Testdata(t *testing.T) { testPlan964(t, concat(basicPrefixes, testdataCases(t))) } +func TestPlan964ModRM(t *testing.T) { testPlan964(t, concat(basicPrefixes, enumModRM)) } +func TestPlan964OneByte(t *testing.T) { testBasic(t, testPlan964) } +func TestPlan9640F(t *testing.T) { testBasic(t, testPlan964, 0x0F) } +func TestPlan9640F38(t *testing.T) { testBasic(t, testPlan964, 0x0F, 0x38) } +func TestPlan9640F3A(t *testing.T) { testBasic(t, testPlan964, 0x0F, 0x3A) } +func TestPlan964Prefix(t *testing.T) { testPrefix(t, testPlan964) } + +func TestPlan964REXTestdata(t *testing.T) { + testPlan964(t, filter(concat3(basicPrefixes, rexPrefixes, testdataCases(t)), isValidREX)) +} +func TestPlan964REXModRM(t *testing.T) { testPlan964(t, concat3(basicPrefixes, rexPrefixes, enumModRM)) } +func TestPlan964REXOneByte(t *testing.T) { testBasicREX(t, testPlan964) } +func TestPlan964REX0F(t *testing.T) { testBasicREX(t, testPlan964, 0x0F) } +func TestPlan964REX0F38(t *testing.T) { testBasicREX(t, testPlan964, 0x0F, 0x38) } +func TestPlan964REX0F3A(t *testing.T) { testBasicREX(t, testPlan964, 0x0F, 0x3A) } +func TestPlan964REXPrefix(t *testing.T) { testPrefixREX(t, testPlan964) } + +// plan9ManualTests holds test cases that will be run by TestPlan9Manual32 and TestPlan9Manual64. +// If you are debugging a few cases that turned up in a longer run, it can be useful +// to list them here and then use -run=Plan9Manual, particularly with tracing enabled. +var plan9ManualTests = ` +` + +// allowedMismatchPlan9 reports whether the mismatch between text and dec +// should be allowed by the test. +func allowedMismatchPlan9(text string, size int, inst *Inst, dec ExtInst) bool { + return false +} + +// Instructions known to us but not to plan9. +var plan9Unsupported = strings.Fields(` +`) diff --git a/vendor/golang.org/x/arch/x86/x86asm/testdata/Makefile b/vendor/golang.org/x/arch/x86/x86asm/testdata/Makefile new file mode 100644 index 00000000..9cb44127 --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/testdata/Makefile @@ -0,0 +1,12 @@ +libmach8db: libmach8db.c + 9c libmach8db.c && 9l -o libmach8db libmach8db.o; rm libmach8db.o + +newdecode.txt: + cd ..; go test -cover -run 'Objdump.*32' -v -timeout 10h -printtests 2>&1 | tee log + cd ..; go test -cover -run 'Objdump.*64' -v -timeout 10h -printtests 2>&1 | tee -a log + cd ..; go test -cover -run 'Xed.*32' -v -timeout 10h -printtests 2>&1 | tee -a log + cd ..; go test -cover -run 'Xed.*64' -v -timeout 10h -printtests 2>&1 | tee -a log + cd ..; go test -cover -run 'Plan9.*32' -v -timeout 10h -printtests 2>&1 | tee -a log + cd ..; go test -cover -run 'Plan9.*64' -v -timeout 10h -printtests 2>&1 | tee -a log + egrep ' (gnu|intel|plan9) ' ../log |sort >newdecode.txt + diff --git a/vendor/golang.org/x/arch/x86/x86asm/testdata/libmach8db.c b/vendor/golang.org/x/arch/x86/x86asm/testdata/libmach8db.c new file mode 100644 index 00000000..90ace524 --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/testdata/libmach8db.c @@ -0,0 +1,2075 @@ +// 9c libmach8db.c && 9l -o libmach8db libmach8db.o; rm libmach8db.o + +// Libmach-based disassembler for use in reference tests. + +// Inferno libmach/8db.c +// http://code.google.com/p/inferno-os/source/browse/utils/libmach/8db.c +// +// Copyright © 1994-1999 Lucent Technologies Inc. +// Power PC support Copyright © 1995-2004 C H Forsyth (forsyth@terzarima.net). +// Portions Copyright © 1997-1999 Vita Nuova Limited. +// Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com). +// Revisions Copyright © 2000-2004 Lucent Technologies Inc. and others. +// Portions Copyright © 2009 The Go Authors. All rights reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a copy +// of this software and associated documentation files (the "Software"), to deal +// in the Software without restriction, including without limitation the rights +// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +// copies of the Software, and to permit persons to whom the Software is +// furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +// THE SOFTWARE. + +#include +#include +#include + +typedef struct Map Map; +struct Map +{ + int (*get1)(Map*, uvlong, uchar*, int); + uchar *p; + uchar *ep; + uchar *startp; + uvlong startpc; +}; + +static int +get1(Map *m, uvlong addr, uchar *p, int n) +{ + return m->get1(m, addr, p, n); +} + +/* + * i386-specific debugger interface + * also amd64 extensions + */ + +static int i386inst(Map*, uvlong, int, char, char*, int); +//static int i386das(Map*, uvlong, char*, int); +//static int i386instlen(Map*, uvlong); + + /* I386/486 - Disassembler and related functions */ + +/* + * an instruction + */ +typedef struct Instr Instr; +struct Instr +{ + uchar mem[1+1+1+1+2+1+1+4+4]; /* raw instruction */ + uvlong addr; /* address of start of instruction */ + int n; /* number of bytes in instruction */ + char *prefix; /* instr prefix */ + char *segment; /* segment override */ + uchar jumptype; /* set to the operand type for jump/ret/call */ + uchar amd64; + uchar rex; /* REX prefix (or zero) */ + uchar op; + char osize; /* 'W' or 'L' (or 'Q' on amd64) */ + char asize; /* address size 'W' or 'L' (or 'Q' or amd64) */ + uchar mod; /* bits 6-7 of mod r/m field */ + uchar reg; /* bits 3-5 of mod r/m field */ + char ss; /* bits 6-7 of SIB */ + schar index; /* bits 3-5 of SIB */ + schar base; /* bits 0-2 of SIB */ + char rip; /* RIP-relative in amd64 mode */ + uchar opre; /* f2/f3 could introduce media */ + short seg; /* segment of far address */ + uint32 disp; /* displacement */ + uint32 imm; /* immediate */ + uint32 imm2; /* second immediate operand */ + uvlong imm64; /* big immediate */ + char *curr; /* fill level in output buffer */ + char *end; /* end of output buffer */ + char *err; /* error message */ +}; + + /* 386 register (ha!) set */ +enum{ + AX=0, + CX, + DX, + BX, + SP, + BP, + SI, + DI, + + /* amd64 */ + /* be careful: some unix system headers #define R8, R9, etc */ + AMD64_R8, + AMD64_R9, + AMD64_R10, + AMD64_R11, + AMD64_R12, + AMD64_R13, + AMD64_R14, + AMD64_R15 +}; + + /* amd64 rex extension byte */ +enum{ + REXW = 1<<3, /* =1, 64-bit operand size */ + REXR = 1<<2, /* extend modrm reg */ + REXX = 1<<1, /* extend sib index */ + REXB = 1<<0 /* extend modrm r/m, sib base, or opcode reg */ +}; + + /* Operand Format codes */ +/* +%A - address size register modifier (!asize -> 'E') +%C - Control register CR0/CR1/CR2 +%D - Debug register DR0/DR1/DR2/DR3/DR6/DR7 +%I - second immediate operand +%O - Operand size register modifier (!osize -> 'E') +%T - Test register TR6/TR7 +%S - size code ('W' or 'L') +%W - Weird opcode: OSIZE == 'W' => "CBW"; else => "CWDE" +%d - displacement 16-32 bits +%e - effective address - Mod R/M value +%f - floating point register F0-F7 - from Mod R/M register +%g - segment register +%i - immediate operand 8-32 bits +%o - register from opcode and REX.B +%p - PC-relative - signed displacement in immediate field +%r - Reg from Mod R/M +%w - Weird opcode: OSIZE == 'W' => "CWD"; else => "CDQ" +*/ + +typedef struct Optable Optable; +struct Optable +{ + char operand[2]; + void *proto; /* actually either (char*) or (Optable*) */ +}; + /* Operand decoding codes */ +enum { + Ib = 1, /* 8-bit immediate - (no sign extension)*/ + Ibs, /* 8-bit immediate (sign extended) */ + Jbs, /* 8-bit sign-extended immediate in jump or call */ + Iw, /* 16-bit immediate -> imm */ + Iw2, /* 16-bit immediate -> imm2 */ + Iwd, /* Operand-sized immediate (no sign extension)*/ + Iwdq, /* Operand-sized immediate, possibly 64 bits */ + Awd, /* Address offset */ + Iwds, /* Operand-sized immediate (sign extended) */ + RM, /* Word or int32 R/M field with register (/r) */ + RMB, /* Byte R/M field with register (/r) */ + RMOP, /* Word or int32 R/M field with op code (/digit) */ + RMOPB, /* Byte R/M field with op code (/digit) */ + RMR, /* R/M register only (mod = 11) */ + RMM, /* R/M memory only (mod = 0/1/2) */ + Op_R0, /* Base reg of Mod R/M is literal 0x00 */ + Op_R1, /* Base reg of Mod R/M is literal 0x01 */ + FRMOP, /* Floating point R/M field with opcode */ + FRMEX, /* Extended floating point R/M field with opcode */ + JUMP, /* Jump or Call flag - no operand */ + RET, /* Return flag - no operand */ + OA, /* literal 0x0a byte */ + PTR, /* Seg:Displacement addr (ptr16:16 or ptr16:32) */ + AUX, /* Multi-byte op code - Auxiliary table */ + AUXMM, /* multi-byte op code - auxiliary table chosen by prefix */ + PRE, /* Instr Prefix */ + OPRE, /* Instr Prefix or media op extension */ + SEG, /* Segment Prefix */ + OPOVER, /* Operand size override */ + ADDOVER, /* Address size override */ +}; + +static Optable optab0F00[8]= +{ +[0x00] = { 0,0, "MOVW LDT,%e" }, +[0x01] = { 0,0, "MOVW TR,%e" }, +[0x02] = { 0,0, "MOVW %e,LDT" }, +[0x03] = { 0,0, "MOVW %e,TR" }, +[0x04] = { 0,0, "VERR %e" }, +[0x05] = { 0,0, "VERW %e" }, +}; + +static Optable optab0F01[8]= +{ +[0x00] = { 0,0, "MOVL GDTR,%e" }, +[0x01] = { 0,0, "MOVL IDTR,%e" }, +[0x02] = { 0,0, "MOVL %e,GDTR" }, +[0x03] = { 0,0, "MOVL %e,IDTR" }, +[0x04] = { 0,0, "MOVW MSW,%e" }, /* word */ +[0x06] = { 0,0, "MOVW %e,MSW" }, /* word */ +[0x07] = { 0,0, "INVLPG %e" }, /* or SWAPGS */ +}; + +static Optable optab0F01F8[1]= +{ +[0x00] = { 0,0, "SWAPGS" }, +}; + +/* 0F71 */ +/* 0F72 */ +/* 0F73 */ + +static Optable optab0FAE[8]= +{ +[0x00] = { 0,0, "FXSAVE %e" }, +[0x01] = { 0,0, "FXRSTOR %e" }, +[0x02] = { 0,0, "LDMXCSR %e" }, +[0x03] = { 0,0, "STMXCSR %e" }, +[0x05] = { 0,0, "LFENCE" }, +[0x06] = { 0,0, "MFENCE" }, +[0x07] = { 0,0, "SFENCE" }, +}; + +/* 0F18 */ +/* 0F0D */ + +static Optable optab0FBA[8]= +{ +[0x04] = { Ib,0, "BT%S %i,%e" }, +[0x05] = { Ib,0, "BTS%S %i,%e" }, +[0x06] = { Ib,0, "BTR%S %i,%e" }, +[0x07] = { Ib,0, "BTC%S %i,%e" }, +}; + +static Optable optab0F0F[256]= +{ +[0x0c] = { 0,0, "PI2FW %m,%M" }, +[0x0d] = { 0,0, "PI2L %m,%M" }, +[0x1c] = { 0,0, "PF2IW %m,%M" }, +[0x1d] = { 0,0, "PF2IL %m,%M" }, +[0x8a] = { 0,0, "PFNACC %m,%M" }, +[0x8e] = { 0,0, "PFPNACC %m,%M" }, +[0x90] = { 0,0, "PFCMPGE %m,%M" }, +[0x94] = { 0,0, "PFMIN %m,%M" }, +[0x96] = { 0,0, "PFRCP %m,%M" }, +[0x97] = { 0,0, "PFRSQRT %m,%M" }, +[0x9a] = { 0,0, "PFSUB %m,%M" }, +[0x9e] = { 0,0, "PFADD %m,%M" }, +[0xa0] = { 0,0, "PFCMPGT %m,%M" }, +[0xa4] = { 0,0, "PFMAX %m,%M" }, +[0xa6] = { 0,0, "PFRCPIT1 %m,%M" }, +[0xa7] = { 0,0, "PFRSQIT1 %m,%M" }, +[0xaa] = { 0,0, "PFSUBR %m,%M" }, +[0xae] = { 0,0, "PFACC %m,%M" }, +[0xb0] = { 0,0, "PFCMPEQ %m,%M" }, +[0xb4] = { 0,0, "PFMUL %m,%M" }, +[0xb6] = { 0,0, "PFRCPI2T %m,%M" }, +[0xb7] = { 0,0, "PMULHRW %m,%M" }, +[0xbb] = { 0,0, "PSWAPL %m,%M" }, +}; + +static Optable optab0FC7[8]= +{ +[0x01] = { 0,0, "CMPXCHG8B %e" }, +}; + +static Optable optab660F71[8]= +{ +[0x02] = { Ib,0, "PSRLW %i,%X" }, +[0x04] = { Ib,0, "PSRAW %i,%X" }, +[0x06] = { Ib,0, "PSLLW %i,%X" }, +}; + +static Optable optab660F72[8]= +{ +[0x02] = { Ib,0, "PSRLL %i,%X" }, +[0x04] = { Ib,0, "PSRAL %i,%X" }, +[0x06] = { Ib,0, "PSLLL %i,%X" }, +}; + +static Optable optab660F73[8]= +{ +[0x02] = { Ib,0, "PSRLQ %i,%X" }, +[0x03] = { Ib,0, "PSRLO %i,%X" }, +[0x06] = { Ib,0, "PSLLQ %i,%X" }, +[0x07] = { Ib,0, "PSLLO %i,%X" }, +}; + +static Optable optab660F[256]= +{ +[0x2B] = { RM,0, "MOVNTPD %x,%e" }, +[0x2E] = { RM,0, "UCOMISD %x,%X" }, +[0x2F] = { RM,0, "COMISD %x,%X" }, +[0x5A] = { RM,0, "CVTPD2PS %x,%X" }, +[0x5B] = { RM,0, "CVTPS2PL %x,%X" }, +[0x6A] = { RM,0, "PUNPCKHLQ %x,%X" }, +[0x6B] = { RM,0, "PACKSSLW %x,%X" }, +[0x6C] = { RM,0, "PUNPCKLQDQ %x,%X" }, +[0x6D] = { RM,0, "PUNPCKHQDQ %x,%X" }, +[0x6E] = { RM,0, "MOV%S %e,%X" }, +[0x6F] = { RM,0, "MOVO %x,%X" }, /* MOVDQA */ +[0x70] = { RM,Ib, "PSHUFL %i,%x,%X" }, +[0x71] = { RMOP,0, optab660F71 }, +[0x72] = { RMOP,0, optab660F72 }, +[0x73] = { RMOP,0, optab660F73 }, +[0x7E] = { RM,0, "MOV%S %X,%e" }, +[0x7F] = { RM,0, "MOVO %X,%x" }, +[0xC4] = { RM,Ib, "PINSRW %i,%e,%X" }, +[0xC5] = { RMR,Ib, "PEXTRW %i,%X,%e" }, +[0xD4] = { RM,0, "PADDQ %x,%X" }, +[0xD5] = { RM,0, "PMULLW %x,%X" }, +[0xD6] = { RM,0, "MOVQ %X,%x" }, +[0xE6] = { RM,0, "CVTTPD2PL %x,%X" }, +[0xE7] = { RM,0, "MOVNTO %X,%e" }, +[0xF7] = { RM,0, "MASKMOVOU %x,%X" }, +}; + +static Optable optabF20F[256]= +{ +[0x10] = { RM,0, "MOVSD %x,%X" }, +[0x11] = { RM,0, "MOVSD %X,%x" }, +[0x2A] = { RM,0, "CVTS%S2SD %e,%X" }, +[0x2C] = { RM,0, "CVTTSD2S%S %x,%r" }, +[0x2D] = { RM,0, "CVTSD2S%S %x,%r" }, +[0x5A] = { RM,0, "CVTSD2SS %x,%X" }, +[0x6F] = { RM,0, "MOVOU %x,%X" }, +[0x70] = { RM,Ib, "PSHUFLW %i,%x,%X" }, +[0x7F] = { RM,0, "MOVOU %X,%x" }, +[0xD6] = { RM,0, "MOVQOZX %M,%X" }, +[0xE6] = { RM,0, "CVTPD2PL %x,%X" }, +}; + +static Optable optabF30F[256]= +{ +[0x10] = { RM,0, "MOVSS %x,%X" }, +[0x11] = { RM,0, "MOVSS %X,%x" }, +[0x2A] = { RM,0, "CVTS%S2SS %e,%X" }, +[0x2C] = { RM,0, "CVTTSS2S%S %x,%r" }, +[0x2D] = { RM,0, "CVTSS2S%S %x,%r" }, +[0x5A] = { RM,0, "CVTSS2SD %x,%X" }, +[0x5B] = { RM,0, "CVTTPS2PL %x,%X" }, +[0x6F] = { RM,0, "MOVOU %x,%X" }, +[0x70] = { RM,Ib, "PSHUFHW %i,%x,%X" }, +[0x7E] = { RM,0, "MOVQOZX %x,%X" }, +[0x7F] = { RM,0, "MOVOU %X,%x" }, +[0xD6] = { RM,0, "MOVQOZX %m*,%X" }, +[0xE6] = { RM,0, "CVTPL2PD %x,%X" }, +}; + +static Optable optab0F[256]= +{ +[0x00] = { RMOP,0, optab0F00 }, +[0x01] = { RMOP,0, optab0F01 }, +[0x02] = { RM,0, "LAR %e,%r" }, +[0x03] = { RM,0, "LSL %e,%r" }, +[0x05] = { 0,0, "SYSCALL" }, +[0x06] = { 0,0, "CLTS" }, +[0x07] = { 0,0, "SYSRET" }, +[0x08] = { 0,0, "INVD" }, +[0x09] = { 0,0, "WBINVD" }, +[0x0B] = { 0,0, "UD2" }, +[0x0F] = { RM,AUX, optab0F0F }, /* 3DNow! */ +[0x10] = { RM,0, "MOVU%s %x,%X" }, +[0x11] = { RM,0, "MOVU%s %X,%x" }, +[0x12] = { RM,0, "MOV[H]L%s %x,%X" }, /* TO DO: H if source is XMM */ +[0x13] = { RM,0, "MOVL%s %X,%e" }, +[0x14] = { RM,0, "UNPCKL%s %x,%X" }, +[0x15] = { RM,0, "UNPCKH%s %x,%X" }, +[0x16] = { RM,0, "MOV[L]H%s %x,%X" }, /* TO DO: L if source is XMM */ +[0x17] = { RM,0, "MOVH%s %X,%x" }, +[0x1F] = { RM,0, "NOP%S %e" }, +[0x20] = { RMR,0, "MOVL %C,%e" }, +[0x21] = { RMR,0, "MOVL %D,%e" }, +[0x22] = { RMR,0, "MOVL %e,%C" }, +[0x23] = { RMR,0, "MOVL %e,%D" }, +[0x24] = { RMR,0, "MOVL %T,%e" }, +[0x26] = { RMR,0, "MOVL %e,%T" }, +[0x28] = { RM,0, "MOVA%s %x,%X" }, +[0x29] = { RM,0, "MOVA%s %X,%x" }, +[0x2A] = { RM,0, "CVTPL2%s %m*,%X" }, +[0x2B] = { RM,0, "MOVNT%s %X,%e" }, +[0x2C] = { RM,0, "CVTT%s2PL %x,%M" }, +[0x2D] = { RM,0, "CVT%s2PL %x,%M" }, +[0x2E] = { RM,0, "UCOMISS %x,%X" }, +[0x2F] = { RM,0, "COMISS %x,%X" }, +[0x30] = { 0,0, "WRMSR" }, +[0x31] = { 0,0, "RDTSC" }, +[0x32] = { 0,0, "RDMSR" }, +[0x33] = { 0,0, "RDPMC" }, +[0x42] = { RM,0, "CMOVC %e,%r" }, /* CF */ +[0x43] = { RM,0, "CMOVNC %e,%r" }, /* ¬ CF */ +[0x44] = { RM,0, "CMOVZ %e,%r" }, /* ZF */ +[0x45] = { RM,0, "CMOVNZ %e,%r" }, /* ¬ ZF */ +[0x46] = { RM,0, "CMOVBE %e,%r" }, /* CF ∨ ZF */ +[0x47] = { RM,0, "CMOVA %e,%r" }, /* ¬CF ∧ ¬ZF */ +[0x48] = { RM,0, "CMOVS %e,%r" }, /* SF */ +[0x49] = { RM,0, "CMOVNS %e,%r" }, /* ¬ SF */ +[0x4A] = { RM,0, "CMOVP %e,%r" }, /* PF */ +[0x4B] = { RM,0, "CMOVNP %e,%r" }, /* ¬ PF */ +[0x4C] = { RM,0, "CMOVLT %e,%r" }, /* LT ≡ OF ≠ SF */ +[0x4D] = { RM,0, "CMOVGE %e,%r" }, /* GE ≡ ZF ∨ SF */ +[0x4E] = { RM,0, "CMOVLE %e,%r" }, /* LE ≡ ZF ∨ LT */ +[0x4F] = { RM,0, "CMOVGT %e,%r" }, /* GT ≡ ¬ZF ∧ GE */ +[0x50] = { RM,0, "MOVMSK%s %X,%r" }, /* TO DO: check */ +[0x51] = { RM,0, "SQRT%s %x,%X" }, +[0x52] = { RM,0, "RSQRT%s %x,%X" }, +[0x53] = { RM,0, "RCP%s %x,%X" }, +[0x54] = { RM,0, "AND%s %x,%X" }, +[0x55] = { RM,0, "ANDN%s %x,%X" }, +[0x56] = { RM,0, "OR%s %x,%X" }, /* TO DO: S/D */ +[0x57] = { RM,0, "XOR%s %x,%X" }, /* S/D */ +[0x58] = { RM,0, "ADD%s %x,%X" }, /* S/P S/D */ +[0x59] = { RM,0, "MUL%s %x,%X" }, +[0x5A] = { RM,0, "CVTPS2PD %x,%X" }, +[0x5B] = { RM,0, "CVTPL2PS %x,%X" }, +[0x5C] = { RM,0, "SUB%s %x,%X" }, +[0x5D] = { RM,0, "MIN%s %x,%X" }, +[0x5E] = { RM,0, "DIV%s %x,%X" }, /* TO DO: S/P S/D */ +[0x5F] = { RM,0, "MAX%s %x,%X" }, +[0x60] = { RM,0, "PUNPCKLBW %m,%M" }, +[0x61] = { RM,0, "PUNPCKLWL %m,%M" }, +[0x62] = { RM,0, "PUNPCKLLQ %m,%M" }, +[0x63] = { RM,0, "PACKSSWB %m,%M" }, +[0x64] = { RM,0, "PCMPGTB %m,%M" }, +[0x65] = { RM,0, "PCMPGTW %m,%M" }, +[0x66] = { RM,0, "PCMPGTL %m,%M" }, +[0x67] = { RM,0, "PACKUSWB %m,%M" }, +[0x68] = { RM,0, "PUNPCKHBW %m,%M" }, +[0x69] = { RM,0, "PUNPCKHWL %m,%M" }, +[0x6A] = { RM,0, "PUNPCKHLQ %m,%M" }, +[0x6B] = { RM,0, "PACKSSLW %m,%M" }, +[0x6E] = { RM,0, "MOV%S %e,%M" }, +[0x6F] = { RM,0, "MOVQ %m,%M" }, +[0x70] = { RM,Ib, "PSHUFW %i,%m,%M" }, +[0x74] = { RM,0, "PCMPEQB %m,%M" }, +[0x75] = { RM,0, "PCMPEQW %m,%M" }, +[0x76] = { RM,0, "PCMPEQL %m,%M" }, +[0x77] = { 0,0, "EMMS" }, +[0x7E] = { RM,0, "MOV%S %M,%e" }, +[0x7F] = { RM,0, "MOVQ %M,%m" }, +[0xAE] = { RMOP,0, optab0FAE }, +[0xAA] = { 0,0, "RSM" }, +[0xB0] = { RM,0, "CMPXCHGB %r,%e" }, +[0xB1] = { RM,0, "CMPXCHG%S %r,%e" }, +[0xC0] = { RMB,0, "XADDB %r,%e" }, +[0xC1] = { RM,0, "XADD%S %r,%e" }, +[0xC2] = { RM,Ib, "CMP%s %x,%X,%#i" }, +[0xC3] = { RM,0, "MOVNTI%S %r,%e" }, +[0xC6] = { RM,Ib, "SHUF%s %i,%x,%X" }, +[0xC8] = { 0,0, "BSWAP AX" }, +[0xC9] = { 0,0, "BSWAP CX" }, +[0xCA] = { 0,0, "BSWAP DX" }, +[0xCB] = { 0,0, "BSWAP BX" }, +[0xCC] = { 0,0, "BSWAP SP" }, +[0xCD] = { 0,0, "BSWAP BP" }, +[0xCE] = { 0,0, "BSWAP SI" }, +[0xCF] = { 0,0, "BSWAP DI" }, +[0xD1] = { RM,0, "PSRLW %m,%M" }, +[0xD2] = { RM,0, "PSRLL %m,%M" }, +[0xD3] = { RM,0, "PSRLQ %m,%M" }, +[0xD5] = { RM,0, "PMULLW %m,%M" }, +[0xD6] = { RM,0, "MOVQOZX %m*,%X" }, +[0xD7] = { RM,0, "PMOVMSKB %m,%r" }, +[0xD8] = { RM,0, "PSUBUSB %m,%M" }, +[0xD9] = { RM,0, "PSUBUSW %m,%M" }, +[0xDA] = { RM,0, "PMINUB %m,%M" }, +[0xDB] = { RM,0, "PAND %m,%M" }, +[0xDC] = { RM,0, "PADDUSB %m,%M" }, +[0xDD] = { RM,0, "PADDUSW %m,%M" }, +[0xDE] = { RM,0, "PMAXUB %m,%M" }, +[0xDF] = { RM,0, "PANDN %m,%M" }, +[0xE0] = { RM,0, "PAVGB %m,%M" }, +[0xE1] = { RM,0, "PSRAW %m,%M" }, +[0xE2] = { RM,0, "PSRAL %m,%M" }, +[0xE3] = { RM,0, "PAVGW %m,%M" }, +[0xE4] = { RM,0, "PMULHUW %m,%M" }, +[0xE5] = { RM,0, "PMULHW %m,%M" }, +[0xE7] = { RM,0, "MOVNTQ %M,%e" }, +[0xE8] = { RM,0, "PSUBSB %m,%M" }, +[0xE9] = { RM,0, "PSUBSW %m,%M" }, +[0xEA] = { RM,0, "PMINSW %m,%M" }, +[0xEB] = { RM,0, "POR %m,%M" }, +[0xEC] = { RM,0, "PADDSB %m,%M" }, +[0xED] = { RM,0, "PADDSW %m,%M" }, +[0xEE] = { RM,0, "PMAXSW %m,%M" }, +[0xEF] = { RM,0, "PXOR %m,%M" }, +[0xF1] = { RM,0, "PSLLW %m,%M" }, +[0xF2] = { RM,0, "PSLLL %m,%M" }, +[0xF3] = { RM,0, "PSLLQ %m,%M" }, +[0xF4] = { RM,0, "PMULULQ %m,%M" }, +[0xF5] = { RM,0, "PMADDWL %m,%M" }, +[0xF6] = { RM,0, "PSADBW %m,%M" }, +[0xF7] = { RMR,0, "MASKMOVQ %m,%M" }, +[0xF8] = { RM,0, "PSUBB %m,%M" }, +[0xF9] = { RM,0, "PSUBW %m,%M" }, +[0xFA] = { RM,0, "PSUBL %m,%M" }, +[0xFC] = { RM,0, "PADDB %m,%M" }, +[0xFD] = { RM,0, "PADDW %m,%M" }, +[0xFE] = { RM,0, "PADDL %m,%M" }, + +[0x80] = { Iwds,0, "JOS %p" }, +[0x81] = { Iwds,0, "JOC %p" }, +[0x82] = { Iwds,0, "JCS %p" }, +[0x83] = { Iwds,0, "JCC %p" }, +[0x84] = { Iwds,0, "JEQ %p" }, +[0x85] = { Iwds,0, "JNE %p" }, +[0x86] = { Iwds,0, "JLS %p" }, +[0x87] = { Iwds,0, "JHI %p" }, +[0x88] = { Iwds,0, "JMI %p" }, +[0x89] = { Iwds,0, "JPL %p" }, +[0x8a] = { Iwds,0, "JPS %p" }, +[0x8b] = { Iwds,0, "JPC %p" }, +[0x8c] = { Iwds,0, "JLT %p" }, +[0x8d] = { Iwds,0, "JGE %p" }, +[0x8e] = { Iwds,0, "JLE %p" }, +[0x8f] = { Iwds,0, "JGT %p" }, +[0x90] = { RMB,0, "SETOS %e" }, +[0x91] = { RMB,0, "SETOC %e" }, +[0x92] = { RMB,0, "SETCS %e" }, +[0x93] = { RMB,0, "SETCC %e" }, +[0x94] = { RMB,0, "SETEQ %e" }, +[0x95] = { RMB,0, "SETNE %e" }, +[0x96] = { RMB,0, "SETLS %e" }, +[0x97] = { RMB,0, "SETHI %e" }, +[0x98] = { RMB,0, "SETMI %e" }, +[0x99] = { RMB,0, "SETPL %e" }, +[0x9a] = { RMB,0, "SETPS %e" }, +[0x9b] = { RMB,0, "SETPC %e" }, +[0x9c] = { RMB,0, "SETLT %e" }, +[0x9d] = { RMB,0, "SETGE %e" }, +[0x9e] = { RMB,0, "SETLE %e" }, +[0x9f] = { RMB,0, "SETGT %e" }, +[0xa0] = { 0,0, "PUSHL FS" }, +[0xa1] = { 0,0, "POPL FS" }, +[0xa2] = { 0,0, "CPUID" }, +[0xa3] = { RM,0, "BT%S %r,%e" }, +[0xa4] = { RM,Ib, "SHLD%S %r,%i,%e" }, +[0xa5] = { RM,0, "SHLD%S %r,CL,%e" }, +[0xa8] = { 0,0, "PUSHL GS" }, +[0xa9] = { 0,0, "POPL GS" }, +[0xab] = { RM,0, "BTS%S %r,%e" }, +[0xac] = { RM,Ib, "SHRD%S %r,%i,%e" }, +[0xad] = { RM,0, "SHRD%S %r,CL,%e" }, +[0xaf] = { RM,0, "IMUL%S %e,%r" }, +[0xb2] = { RMM,0, "LSS %e,%r" }, +[0xb3] = { RM,0, "BTR%S %r,%e" }, +[0xb4] = { RMM,0, "LFS %e,%r" }, +[0xb5] = { RMM,0, "LGS %e,%r" }, +[0xb6] = { RMB,0, "MOVBZX %e,%R" }, +[0xb7] = { RM,0, "MOVWZX %e,%R" }, +[0xba] = { RMOP,0, optab0FBA }, +[0xbb] = { RM,0, "BTC%S %e,%r" }, +[0xbc] = { RM,0, "BSF%S %e,%r" }, +[0xbd] = { RM,0, "BSR%S %e,%r" }, +[0xbe] = { RMB,0, "MOVBSX %e,%R" }, +[0xbf] = { RM,0, "MOVWSX %e,%R" }, +[0xc7] = { RMOP,0, optab0FC7 }, +}; + +static Optable optab80[8]= +{ +[0x00] = { Ib,0, "ADDB %i,%e" }, +[0x01] = { Ib,0, "ORB %i,%e" }, +[0x02] = { Ib,0, "ADCB %i,%e" }, +[0x03] = { Ib,0, "SBBB %i,%e" }, +[0x04] = { Ib,0, "ANDB %i,%e" }, +[0x05] = { Ib,0, "SUBB %i,%e" }, +[0x06] = { Ib,0, "XORB %i,%e" }, +[0x07] = { Ib,0, "CMPB %e,%i" }, +}; + +static Optable optab81[8]= +{ +[0x00] = { Iwd,0, "ADD%S %i,%e" }, +[0x01] = { Iwd,0, "OR%S %i,%e" }, +[0x02] = { Iwd,0, "ADC%S %i,%e" }, +[0x03] = { Iwd,0, "SBB%S %i,%e" }, +[0x04] = { Iwd,0, "AND%S %i,%e" }, +[0x05] = { Iwd,0, "SUB%S %i,%e" }, +[0x06] = { Iwd,0, "XOR%S %i,%e" }, +[0x07] = { Iwd,0, "CMP%S %e,%i" }, +}; + +static Optable optab83[8]= +{ +[0x00] = { Ibs,0, "ADD%S %i,%e" }, +[0x01] = { Ibs,0, "OR%S %i,%e" }, +[0x02] = { Ibs,0, "ADC%S %i,%e" }, +[0x03] = { Ibs,0, "SBB%S %i,%e" }, +[0x04] = { Ibs,0, "AND%S %i,%e" }, +[0x05] = { Ibs,0, "SUB%S %i,%e" }, +[0x06] = { Ibs,0, "XOR%S %i,%e" }, +[0x07] = { Ibs,0, "CMP%S %e,%i" }, +}; + +static Optable optabC0[8] = +{ +[0x00] = { Ib,0, "ROLB %i,%e" }, +[0x01] = { Ib,0, "RORB %i,%e" }, +[0x02] = { Ib,0, "RCLB %i,%e" }, +[0x03] = { Ib,0, "RCRB %i,%e" }, +[0x04] = { Ib,0, "SHLB %i,%e" }, +[0x05] = { Ib,0, "SHRB %i,%e" }, +[0x07] = { Ib,0, "SARB %i,%e" }, +}; + +static Optable optabC1[8] = +{ +[0x00] = { Ib,0, "ROL%S %i,%e" }, +[0x01] = { Ib,0, "ROR%S %i,%e" }, +[0x02] = { Ib,0, "RCL%S %i,%e" }, +[0x03] = { Ib,0, "RCR%S %i,%e" }, +[0x04] = { Ib,0, "SHL%S %i,%e" }, +[0x05] = { Ib,0, "SHR%S %i,%e" }, +[0x07] = { Ib,0, "SAR%S %i,%e" }, +}; + +static Optable optabD0[8] = +{ +[0x00] = { 0,0, "ROLB %e" }, +[0x01] = { 0,0, "RORB %e" }, +[0x02] = { 0,0, "RCLB %e" }, +[0x03] = { 0,0, "RCRB %e" }, +[0x04] = { 0,0, "SHLB %e" }, +[0x05] = { 0,0, "SHRB %e" }, +[0x07] = { 0,0, "SARB %e" }, +}; + +static Optable optabD1[8] = +{ +[0x00] = { 0,0, "ROL%S %e" }, +[0x01] = { 0,0, "ROR%S %e" }, +[0x02] = { 0,0, "RCL%S %e" }, +[0x03] = { 0,0, "RCR%S %e" }, +[0x04] = { 0,0, "SHL%S %e" }, +[0x05] = { 0,0, "SHR%S %e" }, +[0x07] = { 0,0, "SAR%S %e" }, +}; + +static Optable optabD2[8] = +{ +[0x00] = { 0,0, "ROLB CL,%e" }, +[0x01] = { 0,0, "RORB CL,%e" }, +[0x02] = { 0,0, "RCLB CL,%e" }, +[0x03] = { 0,0, "RCRB CL,%e" }, +[0x04] = { 0,0, "SHLB CL,%e" }, +[0x05] = { 0,0, "SHRB CL,%e" }, +[0x07] = { 0,0, "SARB CL,%e" }, +}; + +static Optable optabD3[8] = +{ +[0x00] = { 0,0, "ROL%S CL,%e" }, +[0x01] = { 0,0, "ROR%S CL,%e" }, +[0x02] = { 0,0, "RCL%S CL,%e" }, +[0x03] = { 0,0, "RCR%S CL,%e" }, +[0x04] = { 0,0, "SHL%S CL,%e" }, +[0x05] = { 0,0, "SHR%S CL,%e" }, +[0x07] = { 0,0, "SAR%S CL,%e" }, +}; + +static Optable optabD8[8+8] = +{ +[0x00] = { 0,0, "FADDF %e,F0" }, +[0x01] = { 0,0, "FMULF %e,F0" }, +[0x02] = { 0,0, "FCOMF %e,F0" }, +[0x03] = { 0,0, "FCOMFP %e,F0" }, +[0x04] = { 0,0, "FSUBF %e,F0" }, +[0x05] = { 0,0, "FSUBRF %e,F0" }, +[0x06] = { 0,0, "FDIVF %e,F0" }, +[0x07] = { 0,0, "FDIVRF %e,F0" }, +[0x08] = { 0,0, "FADDD %f,F0" }, +[0x09] = { 0,0, "FMULD %f,F0" }, +[0x0a] = { 0,0, "FCOMD %f,F0" }, +[0x0b] = { 0,0, "FCOMPD %f,F0" }, +[0x0c] = { 0,0, "FSUBD %f,F0" }, +[0x0d] = { 0,0, "FSUBRD %f,F0" }, +[0x0e] = { 0,0, "FDIVD %f,F0" }, +[0x0f] = { 0,0, "FDIVRD %f,F0" }, +}; +/* + * optabD9 and optabDB use the following encoding: + * if (0 <= modrm <= 2) instruction = optabDx[modrm&0x07]; + * else instruction = optabDx[(modrm&0x3f)+8]; + * + * the instructions for MOD == 3, follow the 8 instructions + * for the other MOD values stored at the front of the table. + */ +static Optable optabD9[64+8] = +{ +[0x00] = { 0,0, "FMOVF %e,F0" }, +[0x02] = { 0,0, "FMOVF F0,%e" }, +[0x03] = { 0,0, "FMOVFP F0,%e" }, +[0x04] = { 0,0, "FLDENV%S %e" }, +[0x05] = { 0,0, "FLDCW %e" }, +[0x06] = { 0,0, "FSTENV%S %e" }, +[0x07] = { 0,0, "FSTCW %e" }, +[0x08] = { 0,0, "FMOVD F0,F0" }, /* Mod R/M = 11xx xxxx*/ +[0x09] = { 0,0, "FMOVD F1,F0" }, +[0x0a] = { 0,0, "FMOVD F2,F0" }, +[0x0b] = { 0,0, "FMOVD F3,F0" }, +[0x0c] = { 0,0, "FMOVD F4,F0" }, +[0x0d] = { 0,0, "FMOVD F5,F0" }, +[0x0e] = { 0,0, "FMOVD F6,F0" }, +[0x0f] = { 0,0, "FMOVD F7,F0" }, +[0x10] = { 0,0, "FXCHD F0,F0" }, +[0x11] = { 0,0, "FXCHD F1,F0" }, +[0x12] = { 0,0, "FXCHD F2,F0" }, +[0x13] = { 0,0, "FXCHD F3,F0" }, +[0x14] = { 0,0, "FXCHD F4,F0" }, +[0x15] = { 0,0, "FXCHD F5,F0" }, +[0x16] = { 0,0, "FXCHD F6,F0" }, +[0x17] = { 0,0, "FXCHD F7,F0" }, +[0x18] = { 0,0, "FNOP" }, +[0x28] = { 0,0, "FCHS" }, +[0x29] = { 0,0, "FABS" }, +[0x2c] = { 0,0, "FTST" }, +[0x2d] = { 0,0, "FXAM" }, +[0x30] = { 0,0, "FLD1" }, +[0x31] = { 0,0, "FLDL2T" }, +[0x32] = { 0,0, "FLDL2E" }, +[0x33] = { 0,0, "FLDPI" }, +[0x34] = { 0,0, "FLDLG2" }, +[0x35] = { 0,0, "FLDLN2" }, +[0x36] = { 0,0, "FLDZ" }, +[0x38] = { 0,0, "F2XM1" }, +[0x39] = { 0,0, "FYL2X" }, +[0x3a] = { 0,0, "FPTAN" }, +[0x3b] = { 0,0, "FPATAN" }, +[0x3c] = { 0,0, "FXTRACT" }, +[0x3d] = { 0,0, "FPREM1" }, +[0x3e] = { 0,0, "FDECSTP" }, +[0x3f] = { 0,0, "FNCSTP" }, +[0x40] = { 0,0, "FPREM" }, +[0x41] = { 0,0, "FYL2XP1" }, +[0x42] = { 0,0, "FSQRT" }, +[0x43] = { 0,0, "FSINCOS" }, +[0x44] = { 0,0, "FRNDINT" }, +[0x45] = { 0,0, "FSCALE" }, +[0x46] = { 0,0, "FSIN" }, +[0x47] = { 0,0, "FCOS" }, +}; + +static Optable optabDA[8+8] = +{ +[0x00] = { 0,0, "FADDL %e,F0" }, +[0x01] = { 0,0, "FMULL %e,F0" }, +[0x02] = { 0,0, "FCOML %e,F0" }, +[0x03] = { 0,0, "FCOMLP %e,F0" }, +[0x04] = { 0,0, "FSUBL %e,F0" }, +[0x05] = { 0,0, "FSUBRL %e,F0" }, +[0x06] = { 0,0, "FDIVL %e,F0" }, +[0x07] = { 0,0, "FDIVRL %e,F0" }, +[0x08] = { 0,0, "FCMOVCS %f,F0" }, +[0x09] = { 0,0, "FCMOVEQ %f,F0" }, +[0x0a] = { 0,0, "FCMOVLS %f,F0" }, +[0x0b] = { 0,0, "FCMOVUN %f,F0" }, +[0x0d] = { Op_R1,0, "FUCOMPP" }, +}; + +static Optable optabDB[8+64] = +{ +[0x00] = { 0,0, "FMOVL %e,F0" }, +[0x02] = { 0,0, "FMOVL F0,%e" }, +[0x03] = { 0,0, "FMOVLP F0,%e" }, +[0x05] = { 0,0, "FMOVX %e,F0" }, +[0x07] = { 0,0, "FMOVXP F0,%e" }, +[0x08] = { 0,0, "FCMOVCC F0,F0" }, /* Mod R/M = 11xx xxxx*/ +[0x09] = { 0,0, "FCMOVCC F1,F0" }, +[0x0a] = { 0,0, "FCMOVCC F2,F0" }, +[0x0b] = { 0,0, "FCMOVCC F3,F0" }, +[0x0c] = { 0,0, "FCMOVCC F4,F0" }, +[0x0d] = { 0,0, "FCMOVCC F5,F0" }, +[0x0e] = { 0,0, "FCMOVCC F6,F0" }, +[0x0f] = { 0,0, "FCMOVCC F7,F0" }, +[0x10] = { 0,0, "FCMOVNE F0,F0" }, +[0x11] = { 0,0, "FCMOVNE F1,F0" }, +[0x12] = { 0,0, "FCMOVNE F2,F0" }, +[0x13] = { 0,0, "FCMOVNE F3,F0" }, +[0x14] = { 0,0, "FCMOVNE F4,F0" }, +[0x15] = { 0,0, "FCMOVNE F5,F0" }, +[0x16] = { 0,0, "FCMOVNE F6,F0" }, +[0x17] = { 0,0, "FCMOVNE F7,F0" }, +[0x18] = { 0,0, "FCMOVHI F0,F0" }, +[0x19] = { 0,0, "FCMOVHI F1,F0" }, +[0x1a] = { 0,0, "FCMOVHI F2,F0" }, +[0x1b] = { 0,0, "FCMOVHI F3,F0" }, +[0x1c] = { 0,0, "FCMOVHI F4,F0" }, +[0x1d] = { 0,0, "FCMOVHI F5,F0" }, +[0x1e] = { 0,0, "FCMOVHI F6,F0" }, +[0x1f] = { 0,0, "FCMOVHI F7,F0" }, +[0x20] = { 0,0, "FCMOVNU F0,F0" }, +[0x21] = { 0,0, "FCMOVNU F1,F0" }, +[0x22] = { 0,0, "FCMOVNU F2,F0" }, +[0x23] = { 0,0, "FCMOVNU F3,F0" }, +[0x24] = { 0,0, "FCMOVNU F4,F0" }, +[0x25] = { 0,0, "FCMOVNU F5,F0" }, +[0x26] = { 0,0, "FCMOVNU F6,F0" }, +[0x27] = { 0,0, "FCMOVNU F7,F0" }, +[0x2a] = { 0,0, "FCLEX" }, +[0x2b] = { 0,0, "FINIT" }, +[0x30] = { 0,0, "FUCOMI F0,F0" }, +[0x31] = { 0,0, "FUCOMI F1,F0" }, +[0x32] = { 0,0, "FUCOMI F2,F0" }, +[0x33] = { 0,0, "FUCOMI F3,F0" }, +[0x34] = { 0,0, "FUCOMI F4,F0" }, +[0x35] = { 0,0, "FUCOMI F5,F0" }, +[0x36] = { 0,0, "FUCOMI F6,F0" }, +[0x37] = { 0,0, "FUCOMI F7,F0" }, +[0x38] = { 0,0, "FCOMI F0,F0" }, +[0x39] = { 0,0, "FCOMI F1,F0" }, +[0x3a] = { 0,0, "FCOMI F2,F0" }, +[0x3b] = { 0,0, "FCOMI F3,F0" }, +[0x3c] = { 0,0, "FCOMI F4,F0" }, +[0x3d] = { 0,0, "FCOMI F5,F0" }, +[0x3e] = { 0,0, "FCOMI F6,F0" }, +[0x3f] = { 0,0, "FCOMI F7,F0" }, +}; + +static Optable optabDC[8+8] = +{ +[0x00] = { 0,0, "FADDD %e,F0" }, +[0x01] = { 0,0, "FMULD %e,F0" }, +[0x02] = { 0,0, "FCOMD %e,F0" }, +[0x03] = { 0,0, "FCOMDP %e,F0" }, +[0x04] = { 0,0, "FSUBD %e,F0" }, +[0x05] = { 0,0, "FSUBRD %e,F0" }, +[0x06] = { 0,0, "FDIVD %e,F0" }, +[0x07] = { 0,0, "FDIVRD %e,F0" }, +[0x08] = { 0,0, "FADDD F0,%f" }, +[0x09] = { 0,0, "FMULD F0,%f" }, +[0x0c] = { 0,0, "FSUBRD F0,%f" }, +[0x0d] = { 0,0, "FSUBD F0,%f" }, +[0x0e] = { 0,0, "FDIVRD F0,%f" }, +[0x0f] = { 0,0, "FDIVD F0,%f" }, +}; + +static Optable optabDD[8+8] = +{ +[0x00] = { 0,0, "FMOVD %e,F0" }, +[0x02] = { 0,0, "FMOVD F0,%e" }, +[0x03] = { 0,0, "FMOVDP F0,%e" }, +[0x04] = { 0,0, "FRSTOR%S %e" }, +[0x06] = { 0,0, "FSAVE%S %e" }, +[0x07] = { 0,0, "FSTSW %e" }, +[0x08] = { 0,0, "FFREED %f" }, +[0x0a] = { 0,0, "FMOVD %f,F0" }, +[0x0b] = { 0,0, "FMOVDP %f,F0" }, +[0x0c] = { 0,0, "FUCOMD %f,F0" }, +[0x0d] = { 0,0, "FUCOMDP %f,F0" }, +}; + +static Optable optabDE[8+8] = +{ +[0x00] = { 0,0, "FADDW %e,F0" }, +[0x01] = { 0,0, "FMULW %e,F0" }, +[0x02] = { 0,0, "FCOMW %e,F0" }, +[0x03] = { 0,0, "FCOMWP %e,F0" }, +[0x04] = { 0,0, "FSUBW %e,F0" }, +[0x05] = { 0,0, "FSUBRW %e,F0" }, +[0x06] = { 0,0, "FDIVW %e,F0" }, +[0x07] = { 0,0, "FDIVRW %e,F0" }, +[0x08] = { 0,0, "FADDDP F0,%f" }, +[0x09] = { 0,0, "FMULDP F0,%f" }, +[0x0b] = { Op_R1,0, "FCOMPDP" }, +[0x0c] = { 0,0, "FSUBRDP F0,%f" }, +[0x0d] = { 0,0, "FSUBDP F0,%f" }, +[0x0e] = { 0,0, "FDIVRDP F0,%f" }, +[0x0f] = { 0,0, "FDIVDP F0,%f" }, +}; + +static Optable optabDF[8+8] = +{ +[0x00] = { 0,0, "FMOVW %e,F0" }, +[0x02] = { 0,0, "FMOVW F0,%e" }, +[0x03] = { 0,0, "FMOVWP F0,%e" }, +[0x04] = { 0,0, "FBLD %e" }, +[0x05] = { 0,0, "FMOVL %e,F0" }, +[0x06] = { 0,0, "FBSTP %e" }, +[0x07] = { 0,0, "FMOVLP F0,%e" }, +[0x0c] = { Op_R0,0, "FSTSW %OAX" }, +[0x0d] = { 0,0, "FUCOMIP F0,%f" }, +[0x0e] = { 0,0, "FCOMIP F0,%f" }, +}; + +static Optable optabF6[8] = +{ +[0x00] = { Ib,0, "TESTB %i,%e" }, +[0x02] = { 0,0, "NOTB %e" }, +[0x03] = { 0,0, "NEGB %e" }, +[0x04] = { 0,0, "MULB AL,%e" }, +[0x05] = { 0,0, "IMULB AL,%e" }, +[0x06] = { 0,0, "DIVB AL,%e" }, +[0x07] = { 0,0, "IDIVB AL,%e" }, +}; + +static Optable optabF7[8] = +{ +[0x00] = { Iwd,0, "TEST%S %i,%e" }, +[0x02] = { 0,0, "NOT%S %e" }, +[0x03] = { 0,0, "NEG%S %e" }, +[0x04] = { 0,0, "MUL%S %OAX,%e" }, +[0x05] = { 0,0, "IMUL%S %OAX,%e" }, +[0x06] = { 0,0, "DIV%S %OAX,%e" }, +[0x07] = { 0,0, "IDIV%S %OAX,%e" }, +}; + +static Optable optabFE[8] = +{ +[0x00] = { 0,0, "INCB %e" }, +[0x01] = { 0,0, "DECB %e" }, +}; + +static Optable optabFF[8] = +{ +[0x00] = { 0,0, "INC%S %e" }, +[0x01] = { 0,0, "DEC%S %e" }, +[0x02] = { JUMP,0, "CALL* %e" }, +[0x03] = { JUMP,0, "CALLF* %e" }, +[0x04] = { JUMP,0, "JMP* %e" }, +[0x05] = { JUMP,0, "JMPF* %e" }, +[0x06] = { 0,0, "PUSHL %e" }, +}; + +static Optable optable[256+2] = +{ +[0x00] = { RMB,0, "ADDB %r,%e" }, +[0x01] = { RM,0, "ADD%S %r,%e" }, +[0x02] = { RMB,0, "ADDB %e,%r" }, +[0x03] = { RM,0, "ADD%S %e,%r" }, +[0x04] = { Ib,0, "ADDB %i,AL" }, +[0x05] = { Iwd,0, "ADD%S %i,%OAX" }, +[0x06] = { 0,0, "PUSHL ES" }, +[0x07] = { 0,0, "POPL ES" }, +[0x08] = { RMB,0, "ORB %r,%e" }, +[0x09] = { RM,0, "OR%S %r,%e" }, +[0x0a] = { RMB,0, "ORB %e,%r" }, +[0x0b] = { RM,0, "OR%S %e,%r" }, +[0x0c] = { Ib,0, "ORB %i,AL" }, +[0x0d] = { Iwd,0, "OR%S %i,%OAX" }, +[0x0e] = { 0,0, "PUSHL CS" }, +[0x0f] = { AUXMM,0, optab0F }, +[0x10] = { RMB,0, "ADCB %r,%e" }, +[0x11] = { RM,0, "ADC%S %r,%e" }, +[0x12] = { RMB,0, "ADCB %e,%r" }, +[0x13] = { RM,0, "ADC%S %e,%r" }, +[0x14] = { Ib,0, "ADCB %i,AL" }, +[0x15] = { Iwd,0, "ADC%S %i,%OAX" }, +[0x16] = { 0,0, "PUSHL SS" }, +[0x17] = { 0,0, "POPL SS" }, +[0x18] = { RMB,0, "SBBB %r,%e" }, +[0x19] = { RM,0, "SBB%S %r,%e" }, +[0x1a] = { RMB,0, "SBBB %e,%r" }, +[0x1b] = { RM,0, "SBB%S %e,%r" }, +[0x1c] = { Ib,0, "SBBB %i,AL" }, +[0x1d] = { Iwd,0, "SBB%S %i,%OAX" }, +[0x1e] = { 0,0, "PUSHL DS" }, +[0x1f] = { 0,0, "POPL DS" }, +[0x20] = { RMB,0, "ANDB %r,%e" }, +[0x21] = { RM,0, "AND%S %r,%e" }, +[0x22] = { RMB,0, "ANDB %e,%r" }, +[0x23] = { RM,0, "AND%S %e,%r" }, +[0x24] = { Ib,0, "ANDB %i,AL" }, +[0x25] = { Iwd,0, "AND%S %i,%OAX" }, +[0x26] = { SEG,0, "ES:" }, +[0x27] = { 0,0, "DAA" }, +[0x28] = { RMB,0, "SUBB %r,%e" }, +[0x29] = { RM,0, "SUB%S %r,%e" }, +[0x2a] = { RMB,0, "SUBB %e,%r" }, +[0x2b] = { RM,0, "SUB%S %e,%r" }, +[0x2c] = { Ib,0, "SUBB %i,AL" }, +[0x2d] = { Iwd,0, "SUB%S %i,%OAX" }, +[0x2e] = { SEG,0, "CS:" }, +[0x2f] = { 0,0, "DAS" }, +[0x30] = { RMB,0, "XORB %r,%e" }, +[0x31] = { RM,0, "XOR%S %r,%e" }, +[0x32] = { RMB,0, "XORB %e,%r" }, +[0x33] = { RM,0, "XOR%S %e,%r" }, +[0x34] = { Ib,0, "XORB %i,AL" }, +[0x35] = { Iwd,0, "XOR%S %i,%OAX" }, +[0x36] = { SEG,0, "SS:" }, +[0x37] = { 0,0, "AAA" }, +[0x38] = { RMB,0, "CMPB %r,%e" }, +[0x39] = { RM,0, "CMP%S %r,%e" }, +[0x3a] = { RMB,0, "CMPB %e,%r" }, +[0x3b] = { RM,0, "CMP%S %e,%r" }, +[0x3c] = { Ib,0, "CMPB %i,AL" }, +[0x3d] = { Iwd,0, "CMP%S %i,%OAX" }, +[0x3e] = { SEG,0, "DS:" }, +[0x3f] = { 0,0, "AAS" }, +[0x40] = { 0,0, "INC%S %OAX" }, +[0x41] = { 0,0, "INC%S %OCX" }, +[0x42] = { 0,0, "INC%S %ODX" }, +[0x43] = { 0,0, "INC%S %OBX" }, +[0x44] = { 0,0, "INC%S %OSP" }, +[0x45] = { 0,0, "INC%S %OBP" }, +[0x46] = { 0,0, "INC%S %OSI" }, +[0x47] = { 0,0, "INC%S %ODI" }, +[0x48] = { 0,0, "DEC%S %OAX" }, +[0x49] = { 0,0, "DEC%S %OCX" }, +[0x4a] = { 0,0, "DEC%S %ODX" }, +[0x4b] = { 0,0, "DEC%S %OBX" }, +[0x4c] = { 0,0, "DEC%S %OSP" }, +[0x4d] = { 0,0, "DEC%S %OBP" }, +[0x4e] = { 0,0, "DEC%S %OSI" }, +[0x4f] = { 0,0, "DEC%S %ODI" }, +[0x50] = { 0,0, "PUSH%S %OAX" }, +[0x51] = { 0,0, "PUSH%S %OCX" }, +[0x52] = { 0,0, "PUSH%S %ODX" }, +[0x53] = { 0,0, "PUSH%S %OBX" }, +[0x54] = { 0,0, "PUSH%S %OSP" }, +[0x55] = { 0,0, "PUSH%S %OBP" }, +[0x56] = { 0,0, "PUSH%S %OSI" }, +[0x57] = { 0,0, "PUSH%S %ODI" }, +[0x58] = { 0,0, "POP%S %OAX" }, +[0x59] = { 0,0, "POP%S %OCX" }, +[0x5a] = { 0,0, "POP%S %ODX" }, +[0x5b] = { 0,0, "POP%S %OBX" }, +[0x5c] = { 0,0, "POP%S %OSP" }, +[0x5d] = { 0,0, "POP%S %OBP" }, +[0x5e] = { 0,0, "POP%S %OSI" }, +[0x5f] = { 0,0, "POP%S %ODI" }, +[0x60] = { 0,0, "PUSHA%S" }, +[0x61] = { 0,0, "POPA%S" }, +[0x62] = { RMM,0, "BOUND %e,%r" }, +[0x63] = { RM,0, "ARPL %r,%e" }, +[0x64] = { SEG,0, "FS:" }, +[0x65] = { SEG,0, "GS:" }, +[0x66] = { OPOVER,0, "" }, +[0x67] = { ADDOVER,0, "" }, +[0x68] = { Iwd,0, "PUSH%S %i" }, +[0x69] = { RM,Iwd, "IMUL%S %e,%i,%r" }, +[0x6a] = { Ib,0, "PUSH%S %i" }, +[0x6b] = { RM,Ibs, "IMUL%S %e,%i,%r" }, +[0x6c] = { 0,0, "INSB DX,(%ODI)" }, +[0x6d] = { 0,0, "INS%S DX,(%ODI)" }, +[0x6e] = { 0,0, "OUTSB (%ASI),DX" }, +[0x6f] = { 0,0, "OUTS%S (%ASI),DX" }, +[0x70] = { Jbs,0, "JOS %p" }, +[0x71] = { Jbs,0, "JOC %p" }, +[0x72] = { Jbs,0, "JCS %p" }, +[0x73] = { Jbs,0, "JCC %p" }, +[0x74] = { Jbs,0, "JEQ %p" }, +[0x75] = { Jbs,0, "JNE %p" }, +[0x76] = { Jbs,0, "JLS %p" }, +[0x77] = { Jbs,0, "JHI %p" }, +[0x78] = { Jbs,0, "JMI %p" }, +[0x79] = { Jbs,0, "JPL %p" }, +[0x7a] = { Jbs,0, "JPS %p" }, +[0x7b] = { Jbs,0, "JPC %p" }, +[0x7c] = { Jbs,0, "JLT %p" }, +[0x7d] = { Jbs,0, "JGE %p" }, +[0x7e] = { Jbs,0, "JLE %p" }, +[0x7f] = { Jbs,0, "JGT %p" }, +[0x80] = { RMOPB,0, optab80 }, +[0x81] = { RMOP,0, optab81 }, +[0x83] = { RMOP,0, optab83 }, +[0x84] = { RMB,0, "TESTB %r,%e" }, +[0x85] = { RM,0, "TEST%S %r,%e" }, +[0x86] = { RMB,0, "XCHGB %r,%e" }, +[0x87] = { RM,0, "XCHG%S %r,%e" }, +[0x88] = { RMB,0, "MOVB %r,%e" }, +[0x89] = { RM,0, "MOV%S %r,%e" }, +[0x8a] = { RMB,0, "MOVB %e,%r" }, +[0x8b] = { RM,0, "MOV%S %e,%r" }, +[0x8c] = { RM,0, "MOVW %g,%e" }, +[0x8d] = { RM,0, "LEA%S %e,%r" }, +[0x8e] = { RM,0, "MOVW %e,%g" }, +[0x8f] = { RM,0, "POP%S %e" }, +[0x90] = { 0,0, "NOP" }, +[0x91] = { 0,0, "XCHG %OCX,%OAX" }, +[0x92] = { 0,0, "XCHG %ODX,%OAX" }, +[0x93] = { 0,0, "XCHG %OBX,%OAX" }, +[0x94] = { 0,0, "XCHG %OSP,%OAX" }, +[0x95] = { 0,0, "XCHG %OBP,%OAX" }, +[0x96] = { 0,0, "XCHG %OSI,%OAX" }, +[0x97] = { 0,0, "XCHG %ODI,%OAX" }, +[0x98] = { 0,0, "%W" }, /* miserable CBW or CWDE */ +[0x99] = { 0,0, "%w" }, /* idiotic CWD or CDQ */ +[0x9a] = { PTR,0, "CALL%S %d" }, +[0x9b] = { 0,0, "WAIT" }, +[0x9c] = { 0,0, "PUSHF" }, +[0x9d] = { 0,0, "POPF" }, +[0x9e] = { 0,0, "SAHF" }, +[0x9f] = { 0,0, "LAHF" }, +[0xa0] = { Awd,0, "MOVB %i,AL" }, +[0xa1] = { Awd,0, "MOV%S %i,%OAX" }, +[0xa2] = { Awd,0, "MOVB AL,%i" }, +[0xa3] = { Awd,0, "MOV%S %OAX,%i" }, +[0xa4] = { 0,0, "MOVSB (%ASI),(%ADI)" }, +[0xa5] = { 0,0, "MOVS%S (%ASI),(%ADI)" }, +[0xa6] = { 0,0, "CMPSB (%ASI),(%ADI)" }, +[0xa7] = { 0,0, "CMPS%S (%ASI),(%ADI)" }, +[0xa8] = { Ib,0, "TESTB %i,AL" }, +[0xa9] = { Iwd,0, "TEST%S %i,%OAX" }, +[0xaa] = { 0,0, "STOSB AL,(%ADI)" }, +[0xab] = { 0,0, "STOS%S %OAX,(%ADI)" }, +[0xac] = { 0,0, "LODSB (%ASI),AL" }, +[0xad] = { 0,0, "LODS%S (%ASI),%OAX" }, +[0xae] = { 0,0, "SCASB (%ADI),AL" }, +[0xaf] = { 0,0, "SCAS%S (%ADI),%OAX" }, +[0xb0] = { Ib,0, "MOVB %i,AL" }, +[0xb1] = { Ib,0, "MOVB %i,CL" }, +[0xb2] = { Ib,0, "MOVB %i,DL" }, +[0xb3] = { Ib,0, "MOVB %i,BL" }, +[0xb4] = { Ib,0, "MOVB %i,AH" }, +[0xb5] = { Ib,0, "MOVB %i,CH" }, +[0xb6] = { Ib,0, "MOVB %i,DH" }, +[0xb7] = { Ib,0, "MOVB %i,BH" }, +[0xb8] = { Iwdq,0, "MOV%S %i,%o" }, +[0xb9] = { Iwdq,0, "MOV%S %i,%o" }, +[0xba] = { Iwdq,0, "MOV%S %i,%o" }, +[0xbb] = { Iwdq,0, "MOV%S %i,%o" }, +[0xbc] = { Iwdq,0, "MOV%S %i,%o" }, +[0xbd] = { Iwdq,0, "MOV%S %i,%o" }, +[0xbe] = { Iwdq,0, "MOV%S %i,%o" }, +[0xbf] = { Iwdq,0, "MOV%S %i,%o" }, +[0xc0] = { RMOPB,0, optabC0 }, +[0xc1] = { RMOP,0, optabC1 }, +[0xc2] = { Iw,0, "RET %i" }, +[0xc3] = { RET,0, "RET" }, +[0xc4] = { RM,0, "LES %e,%r" }, +[0xc5] = { RM,0, "LDS %e,%r" }, +[0xc6] = { RMB,Ib, "MOVB %i,%e" }, +[0xc7] = { RM,Iwd, "MOV%S %i,%e" }, +[0xc8] = { Iw2,Ib, "ENTER %i,%I" }, /* loony ENTER */ +[0xc9] = { RET,0, "LEAVE" }, /* bizarre LEAVE */ +[0xca] = { Iw,0, "RETF %i" }, +[0xcb] = { RET,0, "RETF" }, +[0xcc] = { 0,0, "INT 3" }, +[0xcd] = { Ib,0, "INTB %i" }, +[0xce] = { 0,0, "INTO" }, +[0xcf] = { 0,0, "IRET" }, +[0xd0] = { RMOPB,0, optabD0 }, +[0xd1] = { RMOP,0, optabD1 }, +[0xd2] = { RMOPB,0, optabD2 }, +[0xd3] = { RMOP,0, optabD3 }, +[0xd4] = { OA,0, "AAM" }, +[0xd5] = { OA,0, "AAD" }, +[0xd7] = { 0,0, "XLAT" }, +[0xd8] = { FRMOP,0, optabD8 }, +[0xd9] = { FRMEX,0, optabD9 }, +[0xda] = { FRMOP,0, optabDA }, +[0xdb] = { FRMEX,0, optabDB }, +[0xdc] = { FRMOP,0, optabDC }, +[0xdd] = { FRMOP,0, optabDD }, +[0xde] = { FRMOP,0, optabDE }, +[0xdf] = { FRMOP,0, optabDF }, +[0xe0] = { Jbs,0, "LOOPNE %p" }, +[0xe1] = { Jbs,0, "LOOPE %p" }, +[0xe2] = { Jbs,0, "LOOP %p" }, +[0xe3] = { Jbs,0, "JCXZ %p" }, +[0xe4] = { Ib,0, "INB %i,AL" }, +[0xe5] = { Ib,0, "IN%S %i,%OAX" }, +[0xe6] = { Ib,0, "OUTB AL,%i" }, +[0xe7] = { Ib,0, "OUT%S %OAX,%i" }, +[0xe8] = { Iwds,0, "CALL %p" }, +[0xe9] = { Iwds,0, "JMP %p" }, +[0xea] = { PTR,0, "JMP %d" }, +[0xeb] = { Jbs,0, "JMP %p" }, +[0xec] = { 0,0, "INB DX,AL" }, +[0xed] = { 0,0, "IN%S DX,%OAX" }, +[0xee] = { 0,0, "OUTB AL,DX" }, +[0xef] = { 0,0, "OUT%S %OAX,DX" }, +[0xf0] = { PRE,0, "LOCK" }, +[0xf2] = { OPRE,0, "REPNE" }, +[0xf3] = { OPRE,0, "REP" }, +[0xf4] = { 0,0, "HLT" }, +[0xf5] = { 0,0, "CMC" }, +[0xf6] = { RMOPB,0, optabF6 }, +[0xf7] = { RMOP,0, optabF7 }, +[0xf8] = { 0,0, "CLC" }, +[0xf9] = { 0,0, "STC" }, +[0xfa] = { 0,0, "CLI" }, +[0xfb] = { 0,0, "STI" }, +[0xfc] = { 0,0, "CLD" }, +[0xfd] = { 0,0, "STD" }, +[0xfe] = { RMOPB,0, optabFE }, +[0xff] = { RMOP,0, optabFF }, +[0x100] = { RM,0, "MOVLQSX %e,%r" }, +[0x101] = { RM,0, "MOVLQZX %e,%r" }, +}; + +/* + * get a byte of the instruction + */ +static int +igetc(Map *map, Instr *ip, uchar *c) +{ + if(ip->n+1 > sizeof(ip->mem)){ + werrstr("instruction too long"); + return -1; + } + if (get1(map, ip->addr+ip->n, c, 1) < 0) { + werrstr("can't read instruction: %r"); + return -1; + } + ip->mem[ip->n++] = *c; + return 1; +} + +/* + * get two bytes of the instruction + */ +static int +igets(Map *map, Instr *ip, ushort *sp) +{ + uchar c; + ushort s; + + if (igetc(map, ip, &c) < 0) + return -1; + s = c; + if (igetc(map, ip, &c) < 0) + return -1; + s |= (c<<8); + *sp = s; + return 1; +} + +/* + * get 4 bytes of the instruction + */ +static int +igetl(Map *map, Instr *ip, uint32 *lp) +{ + ushort s; + int32 l; + + if (igets(map, ip, &s) < 0) + return -1; + l = s; + if (igets(map, ip, &s) < 0) + return -1; + l |= (s<<16); + *lp = l; + return 1; +} + +/* + * get 8 bytes of the instruction + * +static int +igetq(Map *map, Instr *ip, vlong *qp) +{ + uint32 l; + uvlong q; + + if (igetl(map, ip, &l) < 0) + return -1; + q = l; + if (igetl(map, ip, &l) < 0) + return -1; + q |= ((uvlong)l<<32); + *qp = q; + return 1; +} + */ + +static int +getdisp(Map *map, Instr *ip, int mod, int rm, int code, int pcrel) +{ + uchar c; + ushort s; + + if (mod > 2) + return 1; + if (mod == 1) { + if (igetc(map, ip, &c) < 0) + return -1; + if (c&0x80) + ip->disp = c|0xffffff00; + else + ip->disp = c&0xff; + } else if (mod == 2 || rm == code) { + if (ip->asize == 'E') { + if (igetl(map, ip, &ip->disp) < 0) + return -1; + if (mod == 0) + ip->rip = pcrel; + } else { + if (igets(map, ip, &s) < 0) + return -1; + if (s&0x8000) + ip->disp = s|0xffff0000; + else + ip->disp = s; + } + if (mod == 0) + ip->base = -1; + } + return 1; +} + +static int +modrm(Map *map, Instr *ip, uchar c) +{ + uchar rm, mod; + + mod = (c>>6)&3; + rm = c&7; + ip->mod = mod; + ip->base = rm; + ip->reg = (c>>3)&7; + ip->rip = 0; + if (mod == 3) /* register */ + return 1; + if (ip->asize == 0) { /* 16-bit mode */ + switch(rm) { + case 0: + ip->base = BX; ip->index = SI; + break; + case 1: + ip->base = BX; ip->index = DI; + break; + case 2: + ip->base = BP; ip->index = SI; + break; + case 3: + ip->base = BP; ip->index = DI; + break; + case 4: + ip->base = SI; + break; + case 5: + ip->base = DI; + break; + case 6: + ip->base = BP; + break; + case 7: + ip->base = BX; + break; + default: + break; + } + return getdisp(map, ip, mod, rm, 6, 0); + } + if (rm == 4) { /* scummy sib byte */ + if (igetc(map, ip, &c) < 0) + return -1; + ip->ss = (c>>6)&0x03; + ip->index = (c>>3)&0x07; + if (ip->index == 4) + ip->index = -1; + ip->base = c&0x07; + return getdisp(map, ip, mod, ip->base, 5, 0); + } + return getdisp(map, ip, mod, rm, 5, ip->amd64); +} + +static char * +_hexify(char *buf, uint32 p, int zeros) +{ + uint32 d; + + d = p/16; + if(d) + buf = _hexify(buf, d, zeros-1); + else + while(zeros--) + *buf++ = '0'; + *buf++ = "0123456789abcdef"[p&0x0f]; + return buf; +} + +static Optable * +mkinstr(Map *map, Instr *ip, uvlong pc, int is64) +{ + int i, n, norex; + uchar c; + ushort s; + Optable *op, *obase; + char buf[128]; + + memset(ip, 0, sizeof(*ip)); + norex = 1; + ip->base = -1; + ip->index = -1; + ip->osize = 'L'; + ip->asize = 'E'; + ip->amd64 = is64; + norex = 0; + ip->addr = pc; + if (igetc(map, ip, &c) < 0) + return 0; + obase = optable; +newop: + if(ip->amd64 && !norex){ + if(c >= 0x40 && c <= 0x4f) { + ip->rex = c; + if(igetc(map, ip, &c) < 0) + return 0; + } + if(c == 0x63){ + if(ip->rex&REXW) + op = &obase[0x100]; /* MOVLQSX */ + else + op = &obase[0x101]; /* MOVLQZX */ + goto hack; + } + } + if(obase == optable) + ip->op = c; + op = &obase[c]; +hack: + if (op->proto == 0) { +badop: + n = snprint(buf, sizeof(buf), "opcode: ??"); + for (i = 0; i < ip->n && n < sizeof(buf)-3; i++, n+=2) + _hexify(buf+n, ip->mem[i], 1); + strcpy(buf+n, "??"); + werrstr(buf); + return 0; + } + for(i = 0; i < 2 && op->operand[i]; i++) { + switch(op->operand[i]) { + case Ib: /* 8-bit immediate - (no sign extension)*/ + if (igetc(map, ip, &c) < 0) + return 0; + ip->imm = c&0xff; + ip->imm64 = ip->imm; + break; + case Jbs: /* 8-bit jump immediate (sign extended) */ + if (igetc(map, ip, &c) < 0) + return 0; + if (c&0x80) + ip->imm = c|0xffffff00; + else + ip->imm = c&0xff; + ip->imm64 = (int32)ip->imm; + ip->jumptype = Jbs; + break; + case Ibs: /* 8-bit immediate (sign extended) */ + if (igetc(map, ip, &c) < 0) + return 0; + if (c&0x80) + if (ip->osize == 'L') + ip->imm = c|0xffffff00; + else + ip->imm = c|0xff00; + else + ip->imm = c&0xff; + ip->imm64 = (int32)ip->imm; + break; + case Iw: /* 16-bit immediate -> imm */ + if (igets(map, ip, &s) < 0) + return 0; + ip->imm = s&0xffff; + ip->imm64 = ip->imm; + ip->jumptype = Iw; + break; + case Iw2: /* 16-bit immediate -> in imm2*/ + if (igets(map, ip, &s) < 0) + return 0; + ip->imm2 = s&0xffff; + break; + case Iwd: /* Operand-sized immediate (no sign extension unless 64 bits)*/ + if (ip->osize == 'L') { + if (igetl(map, ip, &ip->imm) < 0) + return 0; + ip->imm64 = ip->imm; + if(ip->rex&REXW && (ip->imm & (1<<31)) != 0) + ip->imm64 |= (vlong)~0 << 32; + } else { + if (igets(map, ip, &s)< 0) + return 0; + ip->imm = s&0xffff; + ip->imm64 = ip->imm; + } + break; + case Iwdq: /* Operand-sized immediate, possibly big */ + if (ip->osize == 'L') { + if (igetl(map, ip, &ip->imm) < 0) + return 0; + ip->imm64 = ip->imm; + if (ip->rex & REXW) { + uint32 l; + if (igetl(map, ip, &l) < 0) + return 0; + ip->imm64 |= (uvlong)l << 32; + } + } else { + if (igets(map, ip, &s)< 0) + return 0; + ip->imm = s&0xffff; + } + break; + case Awd: /* Address-sized immediate (no sign extension)*/ + if (ip->asize == 'E') { + if (igetl(map, ip, &ip->imm) < 0) + return 0; + /* TO DO: REX */ + } else { + if (igets(map, ip, &s)< 0) + return 0; + ip->imm = s&0xffff; + } + break; + case Iwds: /* Operand-sized immediate (sign extended) */ + if (ip->osize == 'L') { + if (igetl(map, ip, &ip->imm) < 0) + return 0; + } else { + if (igets(map, ip, &s)< 0) + return 0; + if (s&0x8000) + ip->imm = s|0xffff0000; + else + ip->imm = s&0xffff; + } + ip->jumptype = Iwds; + break; + case OA: /* literal 0x0a byte */ + if (igetc(map, ip, &c) < 0) + return 0; + if (c != 0x0a) + goto badop; + break; + case Op_R0: /* base register must be R0 */ + if (ip->base != 0) + goto badop; + break; + case Op_R1: /* base register must be R1 */ + if (ip->base != 1) + goto badop; + break; + case RMB: /* R/M field with byte register (/r)*/ + if (igetc(map, ip, &c) < 0) + return 0; + if (modrm(map, ip, c) < 0) + return 0; + ip->osize = 'B'; + break; + case RM: /* R/M field with register (/r) */ + if (igetc(map, ip, &c) < 0) + return 0; + if (modrm(map, ip, c) < 0) + return 0; + break; + case RMOPB: /* R/M field with op code (/digit) */ + if (igetc(map, ip, &c) < 0) + return 0; + if (modrm(map, ip, c) < 0) + return 0; + c = ip->reg; /* secondary op code */ + obase = (Optable*)op->proto; + ip->osize = 'B'; + goto newop; + case RMOP: /* R/M field with op code (/digit) */ + if (igetc(map, ip, &c) < 0) + return 0; + if (modrm(map, ip, c) < 0) + return 0; + obase = (Optable*)op->proto; + if(ip->amd64 && obase == optab0F01 && c == 0xF8) + return optab0F01F8; + c = ip->reg; + goto newop; + case FRMOP: /* FP R/M field with op code (/digit) */ + if (igetc(map, ip, &c) < 0) + return 0; + if (modrm(map, ip, c) < 0) + return 0; + if ((c&0xc0) == 0xc0) + c = ip->reg+8; /* 16 entry table */ + else + c = ip->reg; + obase = (Optable*)op->proto; + goto newop; + case FRMEX: /* Extended FP R/M field with op code (/digit) */ + if (igetc(map, ip, &c) < 0) + return 0; + if (modrm(map, ip, c) < 0) + return 0; + if ((c&0xc0) == 0xc0) + c = (c&0x3f)+8; /* 64-entry table */ + else + c = ip->reg; + obase = (Optable*)op->proto; + goto newop; + case RMR: /* R/M register only (mod = 11) */ + if (igetc(map, ip, &c) < 0) + return 0; + if ((c&0xc0) != 0xc0) { + werrstr("invalid R/M register: %#x", c); + return 0; + } + if (modrm(map, ip, c) < 0) + return 0; + break; + case RMM: /* R/M register only (mod = 11) */ + if (igetc(map, ip, &c) < 0) + return 0; + if ((c&0xc0) == 0xc0) { + werrstr("invalid R/M memory mode: %#x", c); + return 0; + } + if (modrm(map, ip, c) < 0) + return 0; + break; + case PTR: /* Seg:Displacement addr (ptr16:16 or ptr16:32) */ + if (ip->osize == 'L') { + if (igetl(map, ip, &ip->disp) < 0) + return 0; + } else { + if (igets(map, ip, &s)< 0) + return 0; + ip->disp = s&0xffff; + } + if (igets(map, ip, (ushort*)&ip->seg) < 0) + return 0; + ip->jumptype = PTR; + break; + case AUXMM: /* Multi-byte op code; prefix determines table selection */ + if (igetc(map, ip, &c) < 0) + return 0; + obase = (Optable*)op->proto; + switch (ip->opre) { + case 0x66: op = optab660F; break; + case 0xF2: op = optabF20F; break; + case 0xF3: op = optabF30F; break; + default: op = nil; break; + } + if(op != nil && op[c].proto != nil) + obase = op; + norex = 1; /* no more rex prefixes */ + /* otherwise the optab entry captures it */ + goto newop; + case AUX: /* Multi-byte op code - Auxiliary table */ + obase = (Optable*)op->proto; + if (igetc(map, ip, &c) < 0) + return 0; + goto newop; + case OPRE: /* Instr Prefix or media op */ + ip->opre = c; + /* fall through */ + case PRE: /* Instr Prefix */ + ip->prefix = (char*)op->proto; + if (igetc(map, ip, &c) < 0) + return 0; + if (ip->opre && c == 0x0F) + ip->prefix = 0; + goto newop; + case SEG: /* Segment Prefix */ + ip->segment = (char*)op->proto; + if (igetc(map, ip, &c) < 0) + return 0; + goto newop; + case OPOVER: /* Operand size override */ + ip->opre = c; + ip->osize = 'W'; + if (igetc(map, ip, &c) < 0) + return 0; + if (c == 0x0F) + ip->osize = 'L'; + else if (ip->amd64 && (c&0xF0) == 0x40) + ip->osize = 'Q'; + goto newop; + case ADDOVER: /* Address size override */ + ip->asize = 0; + if (igetc(map, ip, &c) < 0) + return 0; + goto newop; + case JUMP: /* mark instruction as JUMP or RET */ + case RET: + ip->jumptype = op->operand[i]; + break; + default: + werrstr("bad operand type %d", op->operand[i]); + return 0; + } + } + return op; +} + +static void +bprint(Instr *ip, char *fmt, ...) +{ + va_list arg; + + va_start(arg, fmt); + ip->curr = vseprint(ip->curr, ip->end, fmt, arg); + va_end(arg); +} + +/* + * if we want to call 16 bit regs AX,BX,CX,... + * and 32 bit regs EAX,EBX,ECX,... then + * change the defs of ANAME and ONAME to: + * #define ANAME(ip) ((ip->asize == 'E' ? "E" : "") + * #define ONAME(ip) ((ip)->osize == 'L' ? "E" : "") + */ +#define ANAME(ip) "" +#define ONAME(ip) "" + +static char *reg[] = { +[AX] = "AX", +[CX] = "CX", +[DX] = "DX", +[BX] = "BX", +[SP] = "SP", +[BP] = "BP", +[SI] = "SI", +[DI] = "DI", + + /* amd64 */ +[AMD64_R8] = "R8", +[AMD64_R9] = "R9", +[AMD64_R10] = "R10", +[AMD64_R11] = "R11", +[AMD64_R12] = "R12", +[AMD64_R13] = "R13", +[AMD64_R14] = "R14", +[AMD64_R15] = "R15", +}; + +static char *breg[] = { "AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH" }; +static char *breg64[] = { "AL", "CL", "DL", "BL", "SPB", "BPB", "SIB", "DIB", + "R8B", "R9B", "R10B", "R11B", "R12B", "R13B", "R14B", "R15B" }; +static char *sreg[] = { "ES", "CS", "SS", "DS", "FS", "GS" }; + +static void +immediate(Instr *ip, vlong val) +{ + // TODO: Translate known names. + if((ip->rex & REXW) == 0) + bprint(ip, "%#lux", (long)val); + else + bprint(ip, "%#llux", val); +} + +static void +pea(Instr *ip) +{ + int base; + + base = ip->base; + if(base >= 0 && (ip->rex & REXB)) + base += 8; + + if (ip->mod == 3) { + if (ip->osize == 'B') + bprint(ip, (ip->rex & REXB? breg64: breg)[(uchar)ip->base]); + else + bprint(ip, "%s%s", ANAME(ip), reg[base]); + return; + } + + if (ip->segment) + bprint(ip, ip->segment); + if (1) { + if (ip->base < 0) + immediate(ip, ip->disp); + else { + bprint(ip, "%#ux", ip->disp); + if(ip->rip) + bprint(ip, "(RIP)"); + bprint(ip,"(%s%s)", ANAME(ip), reg[ip->rex&REXB? ip->base+8: ip->base]); + } + } + if (ip->index >= 0) + bprint(ip,"(%s%s*%d)", ANAME(ip), reg[ip->rex&REXX? ip->index+8: ip->index], 1<ss); +} + +static void +prinstr(Instr *ip, char *fmt) +{ + int sharp, i; + vlong v; + + if (ip->prefix) + bprint(ip, "%s ", ip->prefix); + for (; *fmt && ip->curr < ip->end; fmt++) { + if (*fmt != '%'){ + *ip->curr++ = *fmt; + continue; + } + sharp = 0; + if(*++fmt == '#') { + sharp = 1; + ++fmt; + } + switch(*fmt){ + case '%': + *ip->curr++ = '%'; + break; + case 'A': + bprint(ip, "%s", ANAME(ip)); + break; + case 'C': + bprint(ip, "CR%d", ip->reg); + break; + case 'D': + if (ip->reg < 4 || ip->reg == 6 || ip->reg == 7) + bprint(ip, "DR%d",ip->reg); + else + bprint(ip, "???"); + break; + case 'I': + bprint(ip, "$"); + immediate(ip, ip->imm2); + break; + case 'O': + bprint(ip,"%s", ONAME(ip)); + break; + case 'o': + i = ip->op & 7; + if(ip->rex & REXB) + i += 8; + bprint(ip, "%s", reg[i]); + break; + case 'i': + if(!sharp) + bprint(ip, "$"); + v = ip->imm; + if(ip->rex & REXW) + v = ip->imm64; + immediate(ip, v); + break; + case 'R': + bprint(ip, "%s%s", ONAME(ip), reg[ip->rex&REXR? ip->reg+8: ip->reg]); + break; + case 'S': + if(ip->osize == 'Q' || (ip->osize == 'L' && ip->rex & REXW)) + bprint(ip, "Q"); + else + bprint(ip, "%c", ip->osize); + break; + case 's': + if(ip->opre == 0 || ip->opre == 0x66) + bprint(ip, "P"); + else + bprint(ip, "S"); + if(ip->opre == 0xf2 || ip->opre == 0x66) + bprint(ip, "D"); + else + bprint(ip, "S"); + break; + case 'T': + if (ip->reg == 6 || ip->reg == 7) + bprint(ip, "TR%d",ip->reg); + else + bprint(ip, "???"); + break; + case 'W': + if (ip->osize == 'Q' || (ip->osize == 'L' && ip->rex & REXW)) + bprint(ip, "CDQE"); + else if (ip->osize == 'L') + bprint(ip,"CWDE"); + else + bprint(ip, "CBW"); + break; + case 'd': + bprint(ip,"%#ux:%#ux", ip->seg, ip->disp); + break; + case 'm': + if (ip->mod == 3 && ip->osize != 'B') { + if(fmt[1] != '*'){ + if(ip->opre != 0) { + bprint(ip, "X%d", ip->rex&REXB? ip->base+8: ip->base); + break; + } + } else + fmt++; + bprint(ip, "M%d", ip->base); + break; + } + pea(ip); + break; + case 'e': + pea(ip); + break; + case 'f': + bprint(ip, "F%d", ip->base); + break; + case 'g': + if (ip->reg < 6) + bprint(ip,"%s",sreg[ip->reg]); + else + bprint(ip,"???"); + break; + case 'p': + /* + * signed immediate in the uint32 ip->imm. + */ + v = (int32)ip->imm; + immediate(ip, v+ip->addr+ip->n); + break; + case 'r': + if (ip->osize == 'B') + bprint(ip,"%s", (ip->rex? breg64: breg)[ip->rex&REXR? ip->reg+8: ip->reg]); + else + bprint(ip, reg[ip->rex&REXR? ip->reg+8: ip->reg]); + break; + case 'w': + if (ip->osize == 'Q' || ip->rex & REXW) + bprint(ip, "CQO"); + else if (ip->osize == 'L') + bprint(ip,"CDQ"); + else + bprint(ip, "CWD"); + break; + case 'M': + if(ip->opre != 0) + bprint(ip, "X%d", ip->rex&REXR? ip->reg+8: ip->reg); + else + bprint(ip, "M%d", ip->reg); + break; + case 'x': + if (ip->mod == 3 && ip->osize != 'B') { + bprint(ip, "X%d", ip->rex&REXB? ip->base+8: ip->base); + break; + } + pea(ip); + break; + case 'X': + bprint(ip, "X%d", ip->rex&REXR? ip->reg+8: ip->reg); + break; + default: + bprint(ip, "%%%c", *fmt); + break; + } + } + *ip->curr = 0; /* there's always room for 1 byte */ +} + +static int +i386inst(Map *map, uvlong pc, int is64, char modifier, char *buf, int n) +{ + Instr instr; + Optable *op; + + USED(modifier); + op = mkinstr(map, &instr, pc, is64); + if (op == 0) + return -1; + instr.curr = buf; + instr.end = buf+n-1; + prinstr(&instr, op->proto); + return instr.n; +} + +/* +static int +i386das(Map *map, uvlong pc, char *buf, int n) +{ + Instr instr; + int i; + + if (mkinstr(map, &instr, pc) == 0) { + errstr(buf, n); + return -1; + } + for(i = 0; i < instr.n && n > 2; i++) { + _hexify(buf, instr.mem[i], 1); + buf += 2; + n -= 2; + } + *buf = 0; + return instr.n; +} + +static int +i386instlen(Map *map, uvlong pc) +{ + Instr i; + + if (mkinstr(map, &i, pc)) + return i.n; + return -1; +} +*/ + +static int +getmem(Map *m, uvlong addr, uchar *dst, int ndst) +{ + uchar *p; + + p = m->startp + (addr - m->startpc); + if(p < m->p || p >= m->ep || m->ep - p < ndst) { + werrstr("out of bounds"); + return -1; + } + memmove(dst, p, ndst); + return ndst; +} + +int +x86disasm(uchar *p, uchar *end, uvlong pc, int is64, char *buf, int n) +{ + Map m; + + m.p = p; + m.ep = end; + m.startp = p; + m.startpc = pc; + m.get1 = getmem; + return i386inst(&m, pc, is64, 0, buf, n); +} + +void +usage(void) +{ + fprint(2, "usage: libmach8db file\n"); + exits("usage"); +} + +void +main(int argc, char **argv) +{ + uchar data[10000], *p, *ep; + int fd, n, eof, addr, is64; + Biobuf bstdout; + char buf[1000]; + + fmtinstall('H', encodefmt); + + is64 = 0; + ARGBEGIN{ + case '8': + is64 = 0; + break; + case '6': + is64 = 1; + break; + default: + usage(); + }ARGEND + + if(argc != 1) + usage(); + + fd = open(argv[0], OREAD); + if(fd < 0) + sysfatal("open %s: %r", argv[0]); + + Binit(&bstdout, 1, OWRITE); + p = data; + ep = data; + eof = 0; + addr = 0; + for(;;) { + if(!eof && ep-p < 64) { + memmove(data, p, ep-p); + ep = data + (ep-p); + p = data; + n = readn(fd, ep, data+sizeof data-ep); + if(n <= 0) + eof = 1; + else + ep += n; + } + if(p == ep) + break; + n = x86disasm(p, ep, addr, is64, buf, sizeof buf); + if(n < 0) { + Bprint(&bstdout, "0x%x %.*H error: %r\n", addr, 1, p); + n = 1; + } else { + Bprint(&bstdout, "0x%x %.*H %s\n", addr, n, p, buf); + } + addr += n; + p += n; + } + Bflush(&bstdout); + exits(0); +} diff --git a/vendor/golang.org/x/arch/x86/x86asm/xed_test.go b/vendor/golang.org/x/arch/x86/x86asm/xed_test.go new file mode 100644 index 00000000..91cf8227 --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/xed_test.go @@ -0,0 +1,211 @@ +// Copyright 2014 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package x86asm + +import ( + "bytes" + "strings" + "testing" +) + +func TestXed32Manual(t *testing.T) { testXed32(t, hexCases(t, xedManualTests)) } +func TestXed32Testdata(t *testing.T) { testXed32(t, concat(basicPrefixes, testdataCases(t))) } +func TestXed32ModRM(t *testing.T) { testXed32(t, concat(basicPrefixes, enumModRM)) } +func TestXed32OneByte(t *testing.T) { testBasic(t, testXed32) } +func TestXed320F(t *testing.T) { testBasic(t, testXed32, 0x0F) } +func TestXed320F38(t *testing.T) { testBasic(t, testXed32, 0x0F, 0x38) } +func TestXed320F3A(t *testing.T) { testBasic(t, testXed32, 0x0F, 0x3A) } +func TestXed32Prefix(t *testing.T) { testPrefix(t, testXed32) } + +func TestXed64Manual(t *testing.T) { testXed64(t, hexCases(t, xedManualTests)) } +func TestXed64Testdata(t *testing.T) { testXed64(t, concat(basicPrefixes, testdataCases(t))) } +func TestXed64ModRM(t *testing.T) { testXed64(t, concat(basicPrefixes, enumModRM)) } +func TestXed64OneByte(t *testing.T) { testBasic(t, testXed64) } +func TestXed640F(t *testing.T) { testBasic(t, testXed64, 0x0F) } +func TestXed640F38(t *testing.T) { testBasic(t, testXed64, 0x0F, 0x38) } +func TestXed640F3A(t *testing.T) { testBasic(t, testXed64, 0x0F, 0x3A) } +func TestXed64Prefix(t *testing.T) { testPrefix(t, testXed64) } + +func TestXed64REXTestdata(t *testing.T) { + testXed64(t, filter(concat3(basicPrefixes, rexPrefixes, testdataCases(t)), isValidREX)) +} +func TestXed64REXModRM(t *testing.T) { testXed64(t, concat3(basicPrefixes, rexPrefixes, enumModRM)) } +func TestXed64REXOneByte(t *testing.T) { testBasicREX(t, testXed64) } +func TestXed64REX0F(t *testing.T) { testBasicREX(t, testXed64, 0x0F) } +func TestXed64REX0F38(t *testing.T) { testBasicREX(t, testXed64, 0x0F, 0x38) } +func TestXed64REX0F3A(t *testing.T) { testBasicREX(t, testXed64, 0x0F, 0x3A) } +func TestXed64REXPrefix(t *testing.T) { testPrefixREX(t, testXed64) } + +// xedManualTests holds test cases that will be run by TestXedManual32 and TestXedManual64. +// If you are debugging a few cases that turned up in a longer run, it can be useful +// to list them here and then use -run=XedManual, particularly with tracing enabled. +var xedManualTests = ` +6690 +` + +// allowedMismatchXed reports whether the mismatch between text and dec +// should be allowed by the test. +func allowedMismatchXed(text string, size int, inst *Inst, dec ExtInst) bool { + if (contains(text, "error:") || isPrefix(text) && size == 1) && contains(dec.text, "GENERAL_ERROR", "INSTR_TOO_LONG", "BAD_LOCK_PREFIX") { + return true + } + + if contains(dec.text, "BAD_LOCK_PREFIX") && countExactPrefix(inst, PrefixLOCK|PrefixInvalid) > 0 { + return true + } + + if contains(dec.text, "BAD_LOCK_PREFIX", "GENERAL_ERROR") && countExactPrefix(inst, PrefixLOCK|PrefixImplicit) > 0 { + return true + } + + if text == "lock" && size == 1 && contains(dec.text, "BAD_LOCK_PREFIX") { + return true + } + + // Instructions not known to us. + if (contains(text, "error:") || isPrefix(text) && size == 1) && contains(dec.text, unsupported...) { + return true + } + + // Instructions not known to xed. + if contains(text, xedUnsupported...) && contains(dec.text, "ERROR") { + return true + } + + if (contains(text, "error:") || isPrefix(text) && size == 1) && contains(dec.text, "shl ") && (inst.Opcode>>16)&0xEC38 == 0xC030 { + return true + } + + // 82 11 22: xed says 'adc byte ptr [ecx], 0x22' but there is no justification in the manuals for that. + // C0 30 11: xed says 'shl byte ptr [eax], 0x11' but there is no justification in the manuals for that. + // F6 08 11: xed says 'test byte ptr [eax], 0x11' but there is no justification in the manuals for that. + if (contains(text, "error:") || isPrefix(text) && size == 1) && hasByte(dec.enc[:dec.nenc], 0x82, 0xC0, 0xC1, 0xD0, 0xD1, 0xD2, 0xD3, 0xF6, 0xF7) { + return true + } + + // F3 11 22 and many others: xed allows and drops misused rep/repn prefix. + if (text == "rep" && dec.enc[0] == 0xF3 || (text == "repn" || text == "repne") && dec.enc[0] == 0xF2) && (!contains(dec.text, "ins", "outs", "movs", "lods", "cmps", "scas") || contains(dec.text, "xmm")) { + return true + } + + // 0F C7 30: xed says vmptrld qword ptr [eax]; we say rdrand eax. + // TODO(rsc): Fix, since we are probably wrong, but we don't have vmptrld in the manual. + if contains(text, "rdrand") && contains(dec.text, "vmptrld", "vmxon", "vmclear") { + return true + } + + // F3 0F AE 00: we say 'rdfsbase dword ptr [eax]' but RDFSBASE needs a register. + // Also, this is a 64-bit only instruction. + // TODO(rsc): Fix to reject this encoding. + if contains(text, "rdfsbase", "rdgsbase", "wrfsbase", "wrgsbase") && contains(dec.text, "ERROR") { + return true + } + + // 0F 01 F8: we say swapgs but that's only valid in 64-bit mode. + // TODO(rsc): Fix. + if contains(text, "swapgs") { + return true + } + + // 0F 24 11: 'mov ecx, tr2' except there is no TR2. + // Or maybe the MOV to TR registers doesn't use RMF. + if contains(text, "cr1", "cr5", "cr6", "cr7", "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7") && contains(dec.text, "ERROR") { + return true + } + + // 0F 19 11, 0F 1C 11, 0F 1D 11, 0F 1E 11, 0F 1F 11: xed says nop, + // but the Intel manuals say that the only NOP there is 0F 1F /0. + // Perhaps xed is reporting an older encoding. + if (contains(text, "error:") || isPrefix(text) && size == 1) && contains(dec.text, "nop ") && (inst.Opcode>>8)&0xFFFF38 != 0x0F1F00 { + return true + } + + // 66 0F AE 38: clflushopt but we only know clflush + if contains(text, "clflush") && contains(dec.text, "clflushopt") { + return true + } + + // 0F 20 04 11: MOV SP, CR0 but has mod!=3 despite register argument. + // (This encoding ignores the mod bits.) The decoder sees the non-register + // mod and reads farther ahead to decode the memory reference that + // isn't really there, causing the size to be too large. + // TODO(rsc): Fix. + if text == dec.text && size > dec.nenc && contains(text, " cr", " dr", " tr") { + return true + } + + // 0F AE E9: xed says lfence, which is wrong (only 0F AE E8 is lfence). And so on. + if contains(dec.text, "fence") && hasByte(dec.enc[:dec.nenc], 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF) { + return true + } + + // DD C9, DF C9: xed says 'fxch st0, st1' but that instruction is D9 C9. + if (contains(text, "error:") || isPrefix(text) && size == 1) && contains(dec.text, "fxch ") && hasByte(dec.enc[:dec.nenc], 0xDD, 0xDF) { + return true + } + + // DC D4: xed says 'fcom st0, st4' but that instruction is D8 D4. + if (contains(text, "error:") || isPrefix(text) && size == 1) && contains(dec.text, "fcom ") && hasByte(dec.enc[:dec.nenc], 0xD8, 0xDC) { + return true + } + + // DE D4: xed says 'fcomp st0, st4' but that instruction is D8 D4. + if (contains(text, "error:") || isPrefix(text) && size == 1) && contains(dec.text, "fcomp ") && hasByte(dec.enc[:dec.nenc], 0xDC, 0xDE) { + return true + } + + // DF D4: xed says 'fstp st4, st0' but that instruction is DD D4. + if (contains(text, "error:") || isPrefix(text) && size == 1) && contains(dec.text, "fstp ") && hasByte(dec.enc[:dec.nenc], 0xDF) { + return true + } + + return false +} + +func countExactPrefix(inst *Inst, target Prefix) int { + n := 0 + for _, p := range inst.Prefix { + if p == target { + n++ + } + } + return n +} + +func hasByte(src []byte, target ...byte) bool { + for _, b := range target { + if bytes.IndexByte(src, b) >= 0 { + return true + } + } + return false +} + +// Instructions known to us but not to xed. +var xedUnsupported = strings.Fields(` + xrstor + xsave + xsave + ud1 + xgetbv + xsetbv + fxsave + fxrstor + clflush + lfence + mfence + sfence + rsqrtps + rcpps + emms + ldmxcsr + stmxcsr + movhpd + movnti + rdrand + movbe + movlpd + sysret +`) diff --git a/vendor/golang.org/x/arch/x86/x86asm/xedext_test.go b/vendor/golang.org/x/arch/x86/x86asm/xedext_test.go new file mode 100644 index 00000000..e27cdc07 --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/xedext_test.go @@ -0,0 +1,205 @@ +package x86asm + +import ( + "bytes" + "fmt" + "io" + "log" + "os" + "strconv" + "strings" + "testing" +) + +// xed binary from Intel sde-external-6.22.0-2014-03-06. +const xedPath = "/Users/rsc/bin/xed" + +func testXedArch(t *testing.T, arch int, generate func(func([]byte))) { + if testing.Short() { + t.Skip("skipping xed test in short mode") + } + if _, err := os.Stat(xedPath); err != nil { + t.Skip(err) + } + + testExtDis(t, "intel", arch, xed, generate, allowedMismatchXed) +} + +func testXed32(t *testing.T, generate func(func([]byte))) { + testXedArch(t, 32, generate) +} + +func testXed64(t *testing.T, generate func(func([]byte))) { + testXedArch(t, 64, generate) +} + +func xed(ext *ExtDis) error { + b, err := ext.Run(xedPath, fmt.Sprintf("-%d", ext.Arch), "-n", "1G", "-ir", ext.File.Name()) + if err != nil { + return err + } + + nmatch := 0 + next := uint32(start) + var ( + addr uint32 + encbuf [32]byte + enc []byte + text string + ) + + var xedEnd = []byte("# end of text section") + var xedEnd1 = []byte("# Errors") + + eof := false + for { + line, err := b.ReadSlice('\n') + if err != nil { + if err == io.EOF { + break + } + return fmt.Errorf("reading objdump output: %v", err) + } + if debug { + os.Stdout.Write(line) + } + if bytes.HasPrefix(line, xedEnd) || bytes.HasPrefix(line, xedEnd1) { + eof = true + } + if eof { + continue + } + nmatch++ + addr, enc, text = parseLineXed(line, encbuf[:0]) + if addr > next { + return fmt.Errorf("address out of sync expected <= %#x at %q in:\n%s", next, line, line) + } + if addr < next { + continue + } + switch text { + case "repz": + text = "rep" + case "repnz": + text = "repn" + default: + text = strings.Replace(text, "repz ", "rep ", -1) + text = strings.Replace(text, "repnz ", "repn ", -1) + } + if m := pcrelw.FindStringSubmatch(text); m != nil { + targ, _ := strconv.ParseUint(m[2], 16, 64) + text = fmt.Sprintf("%s .%+#x", m[1], int16(uint32(targ)-uint32(uint16(addr))-uint32(len(enc)))) + } + if m := pcrel.FindStringSubmatch(text); m != nil { + targ, _ := strconv.ParseUint(m[2], 16, 64) + text = fmt.Sprintf("%s .%+#x", m[1], int32(uint32(targ)-addr-uint32(len(enc)))) + } + ext.Dec <- ExtInst{addr, encbuf, len(enc), text} + encbuf = [32]byte{} + enc = nil + next += 32 + } + if next != start+uint32(ext.Size) { + return fmt.Errorf("not enough results found [%d %d]", next, start+ext.Size) + } + if err := ext.Wait(); err != nil { + return fmt.Errorf("exec: %v", err) + } + + return nil +} + +var ( + xedInRaw = []byte("In raw...") + xedDots = []byte("...") + xdis = []byte("XDIS ") + xedError = []byte("ERROR: ") + xedNoDecode = []byte("Could not decode at offset: 0x") +) + +func parseLineXed(line []byte, encstart []byte) (addr uint32, enc []byte, text string) { + oline := line + if bytes.HasPrefix(line, xedInRaw) || bytes.HasPrefix(line, xedDots) { + return 0, nil, "" + } + if bytes.HasPrefix(line, xedError) { + i := bytes.IndexByte(line[len(xedError):], ' ') + if i < 0 { + log.Fatalf("cannot parse error: %q", oline) + } + errstr := string(line[len(xedError):]) + i = bytes.Index(line, xedNoDecode) + if i < 0 { + log.Fatalf("cannot parse error: %q", oline) + } + i += len(xedNoDecode) + j := bytes.IndexByte(line[i:], ' ') + if j < 0 { + log.Fatalf("cannot parse error: %q", oline) + } + x, err := strconv.ParseUint(string(trimSpace(line[i:i+j])), 16, 32) + if err != nil { + log.Fatalf("cannot parse disassembly: %q", oline) + } + addr = uint32(x) + return addr, nil, errstr + } + + if !bytes.HasPrefix(line, xdis) { + log.Fatalf("cannot parse disassembly: %q", oline) + } + + i := bytes.IndexByte(line, ':') + if i < 0 { + log.Fatalf("cannot parse disassembly: %q", oline) + } + x, err := strconv.ParseUint(string(trimSpace(line[len(xdis):i])), 16, 32) + if err != nil { + log.Fatalf("cannot parse disassembly: %q", oline) + } + addr = uint32(x) + + // spaces + i++ + for i < len(line) && line[i] == ' ' { + i++ + } + // instruction class, spaces + for i < len(line) && line[i] != ' ' { + i++ + } + for i < len(line) && line[i] == ' ' { + i++ + } + // instruction set, spaces + for i < len(line) && line[i] != ' ' { + i++ + } + for i < len(line) && line[i] == ' ' { + i++ + } + + // hex + hexStart := i + for i < len(line) && line[i] != ' ' { + i++ + } + hexEnd := i + for i < len(line) && line[i] == ' ' { + i++ + } + + // text + textStart := i + for i < len(line) && line[i] != '\n' { + i++ + } + textEnd := i + + enc, ok := parseHex(line[hexStart:hexEnd], encstart) + if !ok { + log.Fatalf("cannot parse disassembly: %q", oline) + } + + return addr, enc, string(fixSpace(line[textStart:textEnd])) +}