Commit Graph

5 Commits

Author SHA1 Message Date
Alessandro Arzilli
585c711ce5
proc: when converting registers to slices set Base address (#2517)
If the base address isn't set then indexing and slicing will not work.
Large floating point registers already had the base set but small
general purpose registers did not.
2021-06-02 13:46:24 -07:00
Alessandro Arzilli
d552b33822
gdbserial,regnum: support ZMM registers, disable 'g' on debugserver (#2498)
Adds DWARF register number and support for AVX-512 registers.
Changes proc/gdbserial so that the 'g' and 'G' commands are never used
with debugserver since they seem to corrupt the thread state when used
on AVX-512 capable hardware.
Also changes TestClientServer_FpRegisters to be simpler and more
resilient to changes to the Go runtime.

Fixes #2479
2021-05-26 08:21:03 -07:00
Alessandro Arzilli
5a5d5f9e68
proc: fix support for AVX registers (#2139)
Recent changes to the way registers are handled broke reporting of AVX
registers (i.e. YMMx). This change restores the functionality by:

- concatenating the higher half of the YMMx registers to their
  corresponding XMMx lower half (YMMx registers do not have an
  independent DWARF register number)
- modifying the formatSSEReg function to handle them when they are
  present.

Fixes #2033
2020-08-31 10:55:43 -07:00
aarzilli
918ab760a4 proc/core: Make TestCoreFpTest less flaky
Registers XMM1 and XMM2 get sometimes clobbered between the time we set
them and the panic. There is no guarantee that they won't in the go
spec so we shouldn't expect any register to keep its value. However
since this seems to only affect 1 and 2 let's try to use 9 and 10
instead.
2018-03-20 09:34:05 -07:00
aarzilli
8f0646e426 proc: load more registers
Adds ability to load x87, SSE and AVX registers.

Fixes #666
2016-12-19 21:29:45 +01:00