329 lines
8.1 KiB
Go
329 lines
8.1 KiB
Go
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package fbsdutil
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import (
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"golang.org/x/arch/x86/x86asm"
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"github.com/go-delve/delve/pkg/proc"
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"github.com/go-delve/delve/pkg/proc/linutil"
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)
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// AMD64Registers implements the proc.Registers interface for the native/freebsd
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// backend and core/freebsd backends, on AMD64.
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type AMD64Registers struct {
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Regs *AMD64PtraceRegs
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Fpregs []proc.Register
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Fpregset *AMD64Xstate
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Fsbase uint64
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}
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// AMD64PtraceRegs is the struct used by the freebsd kernel to return the
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// general purpose registers for AMD64 CPUs.
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// source: sys/x86/include/reg.h
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type AMD64PtraceRegs struct {
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R15 int64
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R14 int64
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R13 int64
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R12 int64
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R11 int64
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R10 int64
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R9 int64
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R8 int64
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Rdi int64
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Rsi int64
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Rbp int64
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Rbx int64
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Rdx int64
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Rcx int64
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Rax int64
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Trapno uint32
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Fs uint16
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Gs uint16
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Err uint32
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Es uint16
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Ds uint16
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Rip int64
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Cs int64
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Rflags int64
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Rsp int64
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Ss int64
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}
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// Slice returns the registers as a list of (name, value) pairs.
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func (r *AMD64Registers) Slice(floatingPoint bool) []proc.Register {
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var regs64 = []struct {
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k string
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v int64
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}{
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{"R15", r.Regs.R15},
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{"R14", r.Regs.R14},
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{"R13", r.Regs.R13},
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{"R12", r.Regs.R12},
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{"R11", r.Regs.R11},
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{"R10", r.Regs.R10},
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{"R9", r.Regs.R9},
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{"R8", r.Regs.R8},
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{"Rdi", r.Regs.Rdi},
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{"Rsi", r.Regs.Rsi},
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{"Rbp", r.Regs.Rbp},
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{"Rbx", r.Regs.Rbx},
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{"Rdx", r.Regs.Rdx},
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{"Rcx", r.Regs.Rcx},
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{"Rax", r.Regs.Rax},
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{"Rip", r.Regs.Rip},
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{"Cs", r.Regs.Cs},
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{"Rflags", r.Regs.Rflags},
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{"Rsp", r.Regs.Rsp},
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{"Ss", r.Regs.Ss},
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}
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var regs32 = []struct {
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k string
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v uint32
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}{
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{"Trapno", r.Regs.Trapno},
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{"Err", r.Regs.Err},
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}
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var regs16 = []struct {
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k string
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v uint16
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}{
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{"Fs", r.Regs.Fs},
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{"Gs", r.Regs.Gs},
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{"Es", r.Regs.Es},
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{"Ds", r.Regs.Ds},
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}
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out := make([]proc.Register, 0,
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len(regs64)+
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len(regs32)+
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len(regs16)+
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1+ // for Rflags
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len(r.Fpregs))
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for _, reg := range regs64 {
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// FreeBSD defines the registers as signed, but Linux defines
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// them as unsigned. Of course, a register doesn't really have
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// a concept of signedness. Cast to what Delve expects.
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out = proc.AppendQwordReg(out, reg.k, uint64(reg.v))
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}
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for _, reg := range regs32 {
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out = proc.AppendDwordReg(out, reg.k, reg.v)
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}
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for _, reg := range regs16 {
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out = proc.AppendWordReg(out, reg.k, reg.v)
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}
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// x86 called this register "Eflags". amd64 extended it and renamed it
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// "Rflags", but Linux still uses the old name.
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out = proc.AppendEflagReg(out, "Rflags", uint64(r.Regs.Rflags))
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if floatingPoint {
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out = append(out, r.Fpregs...)
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}
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return out
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}
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// PC returns the value of RIP register.
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func (r *AMD64Registers) PC() uint64 {
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return uint64(r.Regs.Rip)
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}
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// SP returns the value of RSP register.
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func (r *AMD64Registers) SP() uint64 {
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return uint64(r.Regs.Rsp)
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}
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func (r *AMD64Registers) BP() uint64 {
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return uint64(r.Regs.Rbp)
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}
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// TLS returns the address of the thread local storage memory segment.
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func (r *AMD64Registers) TLS() uint64 {
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return r.Fsbase
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}
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// GAddr returns the address of the G variable if it is known, 0 and false
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// otherwise.
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func (r *AMD64Registers) GAddr() (uint64, bool) {
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return 0, false
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}
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// Get returns the value of the n-th register (in x86asm order).
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func (r *AMD64Registers) Get(n int) (uint64, error) {
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reg := x86asm.Reg(n)
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const (
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mask8 = 0x000000ff
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mask16 = 0x0000ffff
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mask32 = 0xffffffff
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)
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switch reg {
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// 8-bit
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case x86asm.AL:
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return uint64(r.Regs.Rax) & mask8, nil
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case x86asm.CL:
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return uint64(r.Regs.Rcx) & mask8, nil
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case x86asm.DL:
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return uint64(r.Regs.Rdx) & mask8, nil
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case x86asm.BL:
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return uint64(r.Regs.Rbx) & mask8, nil
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case x86asm.AH:
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return (uint64(r.Regs.Rax) >> 8) & mask8, nil
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case x86asm.CH:
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return (uint64(r.Regs.Rcx) >> 8) & mask8, nil
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case x86asm.DH:
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return (uint64(r.Regs.Rdx) >> 8) & mask8, nil
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case x86asm.BH:
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return (uint64(r.Regs.Rbx) >> 8) & mask8, nil
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case x86asm.SPB:
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return uint64(r.Regs.Rsp) & mask8, nil
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case x86asm.BPB:
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return uint64(r.Regs.Rbp) & mask8, nil
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case x86asm.SIB:
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return uint64(r.Regs.Rsi) & mask8, nil
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case x86asm.DIB:
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return uint64(r.Regs.Rdi) & mask8, nil
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case x86asm.R8B:
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return uint64(r.Regs.R8) & mask8, nil
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case x86asm.R9B:
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return uint64(r.Regs.R9) & mask8, nil
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case x86asm.R10B:
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return uint64(r.Regs.R10) & mask8, nil
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case x86asm.R11B:
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return uint64(r.Regs.R11) & mask8, nil
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case x86asm.R12B:
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return uint64(r.Regs.R12) & mask8, nil
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case x86asm.R13B:
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return uint64(r.Regs.R13) & mask8, nil
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case x86asm.R14B:
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return uint64(r.Regs.R14) & mask8, nil
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case x86asm.R15B:
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return uint64(r.Regs.R15) & mask8, nil
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// 16-bit
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case x86asm.AX:
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return uint64(r.Regs.Rax) & mask16, nil
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case x86asm.CX:
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return uint64(r.Regs.Rcx) & mask16, nil
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case x86asm.DX:
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return uint64(r.Regs.Rdx) & mask16, nil
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case x86asm.BX:
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return uint64(r.Regs.Rbx) & mask16, nil
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case x86asm.SP:
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return uint64(r.Regs.Rsp) & mask16, nil
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case x86asm.BP:
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return uint64(r.Regs.Rbp) & mask16, nil
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case x86asm.SI:
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return uint64(r.Regs.Rsi) & mask16, nil
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case x86asm.DI:
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return uint64(r.Regs.Rdi) & mask16, nil
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case x86asm.R8W:
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return uint64(r.Regs.R8) & mask16, nil
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case x86asm.R9W:
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return uint64(r.Regs.R9) & mask16, nil
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case x86asm.R10W:
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return uint64(r.Regs.R10) & mask16, nil
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case x86asm.R11W:
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return uint64(r.Regs.R11) & mask16, nil
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case x86asm.R12W:
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return uint64(r.Regs.R12) & mask16, nil
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case x86asm.R13W:
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return uint64(r.Regs.R13) & mask16, nil
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case x86asm.R14W:
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return uint64(r.Regs.R14) & mask16, nil
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case x86asm.R15W:
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return uint64(r.Regs.R15) & mask16, nil
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// 32-bit
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case x86asm.EAX:
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return uint64(r.Regs.Rax) & mask32, nil
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case x86asm.ECX:
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return uint64(r.Regs.Rcx) & mask32, nil
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case x86asm.EDX:
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return uint64(r.Regs.Rdx) & mask32, nil
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case x86asm.EBX:
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return uint64(r.Regs.Rbx) & mask32, nil
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case x86asm.ESP:
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return uint64(r.Regs.Rsp) & mask32, nil
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case x86asm.EBP:
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return uint64(r.Regs.Rbp) & mask32, nil
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case x86asm.ESI:
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return uint64(r.Regs.Rsi) & mask32, nil
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case x86asm.EDI:
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return uint64(r.Regs.Rdi) & mask32, nil
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case x86asm.R8L:
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return uint64(r.Regs.R8) & mask32, nil
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case x86asm.R9L:
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return uint64(r.Regs.R9) & mask32, nil
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case x86asm.R10L:
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return uint64(r.Regs.R10) & mask32, nil
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case x86asm.R11L:
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return uint64(r.Regs.R11) & mask32, nil
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case x86asm.R12L:
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return uint64(r.Regs.R12) & mask32, nil
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case x86asm.R13L:
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return uint64(r.Regs.R13) & mask32, nil
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case x86asm.R14L:
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return uint64(r.Regs.R14) & mask32, nil
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case x86asm.R15L:
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return uint64(r.Regs.R15) & mask32, nil
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// 64-bit
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case x86asm.RAX:
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return uint64(r.Regs.Rax), nil
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case x86asm.RCX:
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return uint64(r.Regs.Rcx), nil
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case x86asm.RDX:
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return uint64(r.Regs.Rdx), nil
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case x86asm.RBX:
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return uint64(r.Regs.Rbx), nil
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case x86asm.RSP:
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return uint64(r.Regs.Rsp), nil
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case x86asm.RBP:
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return uint64(r.Regs.Rbp), nil
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case x86asm.RSI:
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return uint64(r.Regs.Rsi), nil
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case x86asm.RDI:
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return uint64(r.Regs.Rdi), nil
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case x86asm.R8:
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return uint64(r.Regs.R8), nil
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case x86asm.R9:
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return uint64(r.Regs.R9), nil
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case x86asm.R10:
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return uint64(r.Regs.R10), nil
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case x86asm.R11:
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return uint64(r.Regs.R11), nil
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case x86asm.R12:
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return uint64(r.Regs.R12), nil
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case x86asm.R13:
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return uint64(r.Regs.R13), nil
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case x86asm.R14:
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return uint64(r.Regs.R14), nil
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case x86asm.R15:
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return uint64(r.Regs.R15), nil
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}
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return 0, proc.ErrUnknownRegister
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}
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// Copy returns a copy of these registers that is guarenteed not to change.
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func (r *AMD64Registers) Copy() proc.Registers {
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var rr AMD64Registers
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rr.Regs = &AMD64PtraceRegs{}
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rr.Fpregset = &AMD64Xstate{}
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*(rr.Regs) = *(r.Regs)
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if r.Fpregset != nil {
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*(rr.Fpregset) = *(r.Fpregset)
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}
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if r.Fpregs != nil {
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rr.Fpregs = make([]proc.Register, len(r.Fpregs))
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copy(rr.Fpregs, r.Fpregs)
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}
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return &rr
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}
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type AMD64Xstate linutil.AMD64Xstate
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func AMD64XstateRead(xstateargs []byte, readLegacy bool, regset *AMD64Xstate) error {
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return linutil.AMD64XstateRead(xstateargs, readLegacy, (*linutil.AMD64Xstate)(regset))
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}
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func (xsave *AMD64Xstate) Decode() (regs []proc.Register) {
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return (*linutil.AMD64Xstate).Decode((*linutil.AMD64Xstate)(xsave))
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}
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