2018-10-17 14:55:53 +00:00
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package linutil
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import (
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2021-03-04 18:28:28 +00:00
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"fmt"
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"github.com/go-delve/delve/pkg/dwarf/op"
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"github.com/go-delve/delve/pkg/dwarf/regnum"
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2019-01-04 18:39:25 +00:00
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"github.com/go-delve/delve/pkg/proc"
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2020-12-14 17:39:01 +00:00
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"github.com/go-delve/delve/pkg/proc/amd64util"
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2018-10-17 14:55:53 +00:00
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)
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// AMD64Registers implements the proc.Registers interface for the native/linux
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// backend and core/linux backends, on AMD64.
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type AMD64Registers struct {
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Regs *AMD64PtraceRegs
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Fpregs []proc.Register
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2020-12-14 17:39:01 +00:00
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Fpregset *amd64util.AMD64Xstate
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2020-05-13 18:56:50 +00:00
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loadFpRegs func(*AMD64Registers) error
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}
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func NewAMD64Registers(regs *AMD64PtraceRegs, loadFpRegs func(*AMD64Registers) error) *AMD64Registers {
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return &AMD64Registers{Regs: regs, loadFpRegs: loadFpRegs}
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2018-10-17 14:55:53 +00:00
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}
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// AMD64PtraceRegs is the struct used by the linux kernel to return the
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// general purpose registers for AMD64 CPUs.
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type AMD64PtraceRegs struct {
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R15 uint64
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R14 uint64
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R13 uint64
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R12 uint64
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Rbp uint64
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Rbx uint64
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R11 uint64
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R10 uint64
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R9 uint64
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R8 uint64
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Rax uint64
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Rcx uint64
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Rdx uint64
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Rsi uint64
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Rdi uint64
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Orig_rax uint64
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Rip uint64
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Cs uint64
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Eflags uint64
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Rsp uint64
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Ss uint64
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Fs_base uint64
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Gs_base uint64
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Ds uint64
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Es uint64
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Fs uint64
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Gs uint64
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}
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// Slice returns the registers as a list of (name, value) pairs.
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func (r *AMD64Registers) Slice(floatingPoint bool) ([]proc.Register, error) {
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2018-10-17 14:55:53 +00:00
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var regs = []struct {
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k string
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v uint64
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}{
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{"Rip", r.Regs.Rip},
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{"Rsp", r.Regs.Rsp},
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{"Rax", r.Regs.Rax},
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{"Rbx", r.Regs.Rbx},
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{"Rcx", r.Regs.Rcx},
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{"Rdx", r.Regs.Rdx},
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{"Rdi", r.Regs.Rdi},
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{"Rsi", r.Regs.Rsi},
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{"Rbp", r.Regs.Rbp},
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{"R8", r.Regs.R8},
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{"R9", r.Regs.R9},
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{"R10", r.Regs.R10},
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{"R11", r.Regs.R11},
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{"R12", r.Regs.R12},
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{"R13", r.Regs.R13},
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{"R14", r.Regs.R14},
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{"R15", r.Regs.R15},
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{"Orig_rax", r.Regs.Orig_rax},
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{"Cs", r.Regs.Cs},
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2020-02-12 21:31:48 +00:00
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{"Rflags", r.Regs.Eflags},
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2018-10-17 14:55:53 +00:00
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{"Ss", r.Regs.Ss},
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{"Fs_base", r.Regs.Fs_base},
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{"Gs_base", r.Regs.Gs_base},
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{"Ds", r.Regs.Ds},
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{"Es", r.Regs.Es},
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{"Fs", r.Regs.Fs},
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{"Gs", r.Regs.Gs},
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}
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out := make([]proc.Register, 0, len(regs)+len(r.Fpregs))
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for _, reg := range regs {
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2020-02-12 21:31:48 +00:00
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out = proc.AppendUint64Register(out, reg.k, reg.v)
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2018-10-17 14:55:53 +00:00
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}
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2020-05-13 18:56:50 +00:00
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var floatLoadError error
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2019-02-26 16:53:45 +00:00
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if floatingPoint {
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2020-05-13 18:56:50 +00:00
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if r.loadFpRegs != nil {
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floatLoadError = r.loadFpRegs(r)
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r.loadFpRegs = nil
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}
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2019-02-26 16:53:45 +00:00
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out = append(out, r.Fpregs...)
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}
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2020-05-13 18:56:50 +00:00
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return out, floatLoadError
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2018-10-17 14:55:53 +00:00
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}
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// PC returns the value of RIP register.
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func (r *AMD64Registers) PC() uint64 {
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return r.Regs.Rip
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}
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// SP returns the value of RSP register.
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func (r *AMD64Registers) SP() uint64 {
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return r.Regs.Rsp
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}
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func (r *AMD64Registers) BP() uint64 {
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return r.Regs.Rbp
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}
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// TLS returns the address of the thread local storage memory segment.
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func (r *AMD64Registers) TLS() uint64 {
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return r.Regs.Fs_base
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}
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// GAddr returns the address of the G variable if it is known, 0 and false
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// otherwise.
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func (r *AMD64Registers) GAddr() (uint64, bool) {
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return 0, false
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}
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2022-05-03 17:46:24 +00:00
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// LR returns the link register.
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func (r *AMD64Registers) LR() uint64 {
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panic("not valid")
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}
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2020-08-24 17:19:50 +00:00
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// Copy returns a copy of these registers that is guaranteed not to change.
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2020-05-13 18:56:50 +00:00
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func (r *AMD64Registers) Copy() (proc.Registers, error) {
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if r.loadFpRegs != nil {
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err := r.loadFpRegs(r)
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r.loadFpRegs = nil
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if err != nil {
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return nil, err
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}
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}
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2018-10-17 14:55:53 +00:00
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var rr AMD64Registers
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rr.Regs = &AMD64PtraceRegs{}
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2020-12-14 17:39:01 +00:00
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rr.Fpregset = &amd64util.AMD64Xstate{}
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2018-10-17 14:55:53 +00:00
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*(rr.Regs) = *(r.Regs)
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if r.Fpregset != nil {
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*(rr.Fpregset) = *(r.Fpregset)
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}
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if r.Fpregs != nil {
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rr.Fpregs = make([]proc.Register, len(r.Fpregs))
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copy(rr.Fpregs, r.Fpregs)
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}
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return &rr, nil
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2018-10-17 14:55:53 +00:00
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}
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2021-03-04 18:28:28 +00:00
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func (r *AMD64Registers) SetReg(regNum uint64, reg *op.DwarfRegister) (bool, error) {
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var p *uint64
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switch regNum {
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case regnum.AMD64_Rax:
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p = &r.Regs.Rax
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case regnum.AMD64_Rbx:
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p = &r.Regs.Rbx
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case regnum.AMD64_Rcx:
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p = &r.Regs.Rcx
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case regnum.AMD64_Rdx:
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p = &r.Regs.Rdx
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case regnum.AMD64_Rsi:
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p = &r.Regs.Rsi
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case regnum.AMD64_Rdi:
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p = &r.Regs.Rdi
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case regnum.AMD64_Rbp:
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p = &r.Regs.Rbp
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case regnum.AMD64_Rsp:
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p = &r.Regs.Rsp
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case regnum.AMD64_R8:
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p = &r.Regs.R8
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case regnum.AMD64_R9:
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p = &r.Regs.R9
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case regnum.AMD64_R10:
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p = &r.Regs.R10
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case regnum.AMD64_R11:
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p = &r.Regs.R11
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case regnum.AMD64_R12:
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p = &r.Regs.R12
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case regnum.AMD64_R13:
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p = &r.Regs.R13
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case regnum.AMD64_R14:
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p = &r.Regs.R14
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case regnum.AMD64_R15:
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p = &r.Regs.R15
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case regnum.AMD64_Rip:
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p = &r.Regs.Rip
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2022-05-05 15:41:40 +00:00
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case regnum.AMD64_Rflags:
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p = &r.Regs.Eflags
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2021-03-04 18:28:28 +00:00
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}
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if p != nil {
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if reg.Bytes != nil && len(reg.Bytes) != 8 {
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return false, fmt.Errorf("wrong number of bytes for register %s (%d)", regnum.AMD64ToName(regNum), len(reg.Bytes))
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}
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*p = reg.Uint64Val
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return false, nil
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}
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if r.loadFpRegs != nil {
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err := r.loadFpRegs(r)
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if err != nil {
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return false, err
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}
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r.loadFpRegs = nil
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}
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if regNum < regnum.AMD64_XMM0 || regNum > regnum.AMD64_XMM0+15 {
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return false, fmt.Errorf("can not set %s", regnum.AMD64ToName(regNum))
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}
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reg.FillBytes()
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err := r.Fpregset.SetXmmRegister(int(regNum-regnum.AMD64_XMM0), reg.Bytes)
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if err != nil {
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return false, err
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}
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return true, nil
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}
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